• Applied Chemistry for Engineering
• /
• v.33 no.1
• /
• pp.50-57
• /
• 2022

Ti-In-Zn-O (TIZO)/Ag/TIZO multilayer transparent electrodes were prepared on glass substrates at room temperature using RF/DC magnetron sputtering. Obtained multilayer structure comprising TIZO/Ag/TIZO (10 nm/10 nm/40 nm) with the total thickness of 60 nm showed a transmittance of 86.5% at 650 nm and a sheet resistance of 8.1 Ω/□. The multilayer films were expected to be applicable for use in energy-saving smart window based on polymer-dispersed liquid crystal (PDLC) because of their transmittance properties to effectively block infrared rays (heat rays). We investigated the effects of the content ratio of prepolymer, the thickness of the PDLC coating layer, and the ultraviolet (UV) light intensity on electro-optical properties, and the surface morphology of polyester acrylate-based PDLC systems using new TIZO/Ag/TIZO transparent conducting electrodes. A PDLC cell with a thickness of 15 ㎛ PDLC layer photocured at an UV intensity of 1.5 mW/cm² exhibited good driving voltage, favorable on-state transmittance, and excellent off-haze. The LC droplets formed on the surface of the polymer matrix of the PDLC composite had a size range of 1 to 3 ㎛ capable of efficiently scattering incident light. Also, the PDLC-based smart window manufactured using TIZO/Ag/TIZO multi-layered transparent electrodes in this study exhibited a light brown, which will have an advantage in terms of aesthetics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.11 no.6
• /
• pp.436-441
• /
• 1998

$Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ structure was prepared by rf-magnetron sputtering method for use in nondestructive read out ferroelectric RAM(NDRO-FEAM). PBx(Zr_{0.52}Ti_{0.48})O_3}$(PZT) and $SrTiO_3$(STO) films were deposited respectively at the temperatures of $300^{\circ}C and 500^{\circ}C$on p-Si(100) substrate. The role of the STO film as a buffer layer between the PZT film and the Si substrate was studied using X-ray diffraction (XRD), Auger electron spectroscopy (ASE), and scanning electron microscope(SEM). Structural analysis on the interfaces was carried out using a cross sectional transmission electron microscope(TEM). For PZT/Si structure, mostly Pb deficient pyrochlore phase was formed due to the serious diffusion of Pb into the Si substrate. On the other hand, for STO/PZT/STO/Si structure, the PZT film had perovskite phase and larger grain size with a little Pb interdiffusion. the interfaces of the PZT and the STO film, of the STO film and the interface layer and $SiO_2$, and of the $SiO_2$ and the Si substate had a good flatness. Across sectional TEM image showed the existence of an amorphous layer and $SiO_2$ with 7nm thickness between the STO film and the Si substrate. The electrical properties of MIFIS structure was characterized by C-V and I-V measurements. By 1MHz C-V characteristics Pt/STO(25nm)/PZT(160nm)/STO(25nm)/Si structure, memory window was about 1.2 V for and applied voltage of 5 V. Memory window increased by increasing the applied voltage and maximum voltage of memory window was 2 V for V applied. Memory window decreased by decreasing PZT film thickness to 110nm. Typical leakage current was abour $10{-8}$ A/cm for an applied voltage of 5 V.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.15 no.4
• /
• pp.665-670
• /
• 2020

Buffer layer in CIGS thin-film solar cells improves energy conversion efficiency through band alignment between the absorption layer and the window layer. ZnS is a non-toxic II-VI compound semiconductor with direct-transition band gaps and n-conductivity as well as with excellent lattice matching for CIGS absorbent layers. In this study, the structural and optical properties of ZnS thin films, deposited by RF magnetron sputtering method and subsequently performed by the rapid thermal annealing treatment, were investigated for the buffer layer. The zincblende cubic structures along (111), (220), and (311) were shown in all specimens. The rapid thermal annealed specimens at the relatively low temperatures were polycrystalline structure with the wurtzite hexagonal structures along (002). Rapid thermal annealing at high temperatures changed the polycrystalline structure to the single crystal of the zincblende cubic structures. Through the chemical analysis, the zincblende cubic structure was obtained in the specimen with the ratio of Zn/S near stoichiometry. ZnS thin film showed the shifted absorption edge towards the lower wavelength as annealing temperature increased, and the mean optical transmittance in the visible light range increased to 80.40% under 500℃ conditions.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2001.11a
• /
• pp.111-114
• /
• 2001

Optical transmitter and receiver are the essential components for optical communication. For these components, butterfly type packages are used which are comprised of metal housing, multilayer ceramic inserts, lead and window. In this study, 2.5 Gbps DFB(Distributed -Feedback) LD(Laser Diode) package was fabricated and characterized. Metal housing showed good thermal conductivity (200W/mK) and well matched TCE(6.7ppm/K) with GaAs chip. Ceramic inserts also showed good VSWR(Voltage Standing Wave Ratio) characteristics(<2.0). By brazing technology, all the elements were combined and sealed. RF characteristics of the package mounted on the PWB was also tested.

• 한국신재생에너지학회:학술대회논문집
• /
• 2008.05a
• /
• pp.436-437
• /
• 2008

Flexible CIGS thin film solar cell was fabricated using STS430 plate as a flexible substrate in this work. A diffusion barrier layer of $SiO_2$ thin film was deposited on STS430 substrate by PECVD followed by deposition of double layered Mo back contact. After depositing CIGS absorber layer by co-evaporation, CdS buffer layer by chemical bath deposition, ZnO window layer by RF sputtering and Al electrode by thermal evaporation, the solar cell fabrication processes were completed and its performance was evaluated. Corresponding solar cell showed an conversion efficiency of 8.35 % with $V_{OC}$ of 0.52 V, $J_{SC}$ of 26.06 mA/$cm^2$ and FF of 0.61.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.119-119
• /
• 2008

The electrical characteristics of Metal-Ferroelectric-Nitride-Oxide-Silicon (MFNOS) structure is studied and compared to the conventional Silicon-Oixde-Nitride-Oxide-Silicon (SONOS) capacitor. The ferroelectric blocking layer is SrBiNbO (SBN with Sr/Bi ratio 1-x/2+x) with the thickness of 200 nm and is fabricated by the RF sputter. The memory windows of MFNOS and SONOS capacitors with sweep voltage from +10 V to -10 V are 6.9 V and 5.9 V, respectively. The effect of ferroelectric blocking layer and charge trapping on the memory window was discussed. The retention of MFNOS capacitor also shows the 10-years and longer retention time than that of the SONOS capacitor. The better retention properties of the MFNOS capacitor may be attributed to the charge holding effect by the polarization of ferroelectric layer.

• Journal of the Korean Physical Society
• /
• v.73 no.11
• /
• pp.1750-1759
• /
• 2018

A complete code-package for gyrotron simulation to analyze its performance is under development in UNIST, Korea. We first time report the present status of the code-package named as UNIST Gyrotron Design Tool (UGDT). It can perform design simulations for gyrotron's interaction cavity, RF window, and the essential mode calculations including the study of mode competition. We will discuss about its salient features, theory, numerical implementation, and its calculation result for 95 GHz UNIST Gyrotron. Moreover, we will validate its capability to perform the mode competition calculation for fundamental and second harmonic modes.

• Korean Journal of Materials Research
• /
• v.21 no.9
• /
• pp.497-501
• /
• 2011

The CdS thin film used as a window layer in the CdTe thin film solar cell transports photo-generated electrons to the front contact and forms a p-n junction with the CdTe layer. This is why the electrical, optical, and surface properties of the CdS thin film influence the efficiency of the CdTe thin film solar cell. When CdTe thin film solar cells are fabricated, a heat treatment is done to improve the qualities of the CdS thin films. Of the many types of heat treatments, the $CdCl_2$ heat treatment is most widely used because the grain size in CdS thin films increases and interdiffusion between the CdS and the CdTe layer is prevented by the heat treatment. To investigate the changes in the electrical, optical, and surface properties and the crystallinity of the CdS thin films due to heat treatment, CdS thin films were deposited on FTO/glass substrates by the rf magnetron sputtering technique, and then a $CdCl_2$ heat treatment was carried out. After the $CdCl_2$ heat treatment, the clustershaped grains in the CdS thin film increased in size and their boundaries became faint. XRD results show that the crystallinity improved and the crystalline size increased from 15 to 42 nm. The resistivity of the CdS single layer decreased from 3.87 to 0.26 ${\Omega}cm$, and the transmittance in the visible region increased from 64% to 74%.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.45 no.12
• /
• pp.42-48
• /
• 2008

Next generation wireless communication systems require RF transceivers that enable multiband/multimode operations. Polar transmitters are known as good candidates for high data rate systems such as EDGE (Enhanced Data Rates for GSM Evolution), WCDMA (Wideband Code Division Multiple Access), and WLAN (Wireless Local Area Network) because they can obtain high efficiency by using efficient switched-mode RF power amplifiers. In this paper, we investigate the performance of a simple peak windowing scheme for the OFDM (Orthogonal frequency Division Multiplexing) polar transmitter, which requires no change of a receiver structure or no additional information transmission. The approach we employed is to apply the peak windowing scheme to the amplitude modulated signals of the polar transmitter to reduce the PAPR (Peak-to-Average Power Ratio). The BER (Bit Error Rate) and EVM (Error Vector Magnitude) performances are measured for various window types and lengths. The simulation results demonstrate that the proposed algorithm mitigates out-of-band distortion introduced by clipping along with PAPR reduction.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2000.02a
• /
• pp.67-67
• /
• 2000

CeO2는 cubic 구조의 일종인 CaR2 구조를 가지고 있으며 격자상수가 Si의 격장상수와 매우 비슷하여 Si 기판위에 에피텍셜하게 성장할 수 있는 가능성이 매우 크다. 따라서 SOI(silicon-on-insulator)구조의 실현을 위하여 Si 기판위에 CeO2 박막을 에피텍셜하게 성장시키려는 많은 노력이 있어왔다. 또한 metal-ferroelectric-semiconductor field effect transistor)에서 ferroelectric 박막과 Si 기판사이의 완충층으로 사용된다. 이러한 CeO2의 응용을 위해서는 Si 기판 위에 성장된 CeO2 박막의 방위성 및 CeO2/Si 구조의 전기적 특성을 알아보는 것이 매우 중요하다. 본 연구에서는 Si(100) 기판위에 CeO2(200)방향으로 성장하는 박막과 EcO2(111) 방향으로 성장하는 박막을 rf magnetron sputtering 방법으로 증착하여 각각의 구조적, 전기적 특성을 분석하였다. RCA 방법으로 세정한 P-type Si(100)기판위에 Ce target과 O2를 사용하여 CeO2(200) 및 CeO2(111)박막을 증착하였다. 증착후 RTA(rapid thermal annealing)방법으로 95$0^{\circ}C$, O2 분위기에서 5분간 열처리를 하였다 이렇게 제작된 CeO2 박막의 구조적 특성을 XRD(x-ray diffraction)방법으로 분석하였고, Al/CeO2/Si의 MIS(metal-insulator-semiconductor)구조를 제작하여 C-V (capacitance-voltage), I-V (current-voltage) 특성을 분석하였으며 TEM(transmission electron microscopy)으로 증착된 CeO2막과 Si 기판과의 계면 특성을 연구하였다. C-V특성에 있어서 CeO2(111)/Si은 CeO2(111)의 두께가 증가함에 따라 hysteresis windows가 증가한 방면 CeO2(200)/Si은 hysteresis windows가 아주 작을뿐만 아니라 CeO2(200)의 두께가 증가하더라도 hysteresis windos가 증가하지 않았다. CeO2(111)/Si과 CeO2(200)/Si의 C-V 특성의 차이는 CeO2(111)과 CeO2(200)이 Si 기판에 의해 받은 stress의 차이와 이에 따른 defect형성의 차이에 의한 것으로 사료된다.