• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.143-149
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• 2008

A novel compact model for a five-port transformer balun is proposed for the efficient circuit design of hybrid balun. Compared to the conventional model, the proposed model provides much faster computation time and more reasonable values for the extracted parameters. The hybrid balun, realized in $0.18\;{\mu}m$ CMOS, achieves 2.8 dB higher gain and 1.9 dB lower noise figure than its passive counterpart only at a current consumption of 0.67 mA from 1.2 V supply. By employing the hybrid balun, a differential zero-IF receiver is designed in $0.18\;{\mu}m$ CMOS for IEEE 802.15.4 ZigBee applications. It is composed of a differential cascode LNA, passive mixers, and active RC filters. Comparative investigations on the three receiver designs, each employing the hybrid balun, a simple transformer balun, and an ideal balun, clearly demonstrate the advantages of the hybrid balun in fully differential CMOS RF receivers. The simulated results of the receiver with the hybrid balun show 33 dB of conversion gain, 4.2 dB of noise figure with 20 kHz of 1/f noise corner frequency, and -17.5 dBm of IIP3 at a current consumption of 5 mA from 1.8 V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.5 s.120
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• pp.530-538
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• 2007

An inductor library for efficient low cost RFIC design has been developed based on a standard digital 0.18 ${\mu}m$ CMOS process. The developed library provides four structural variations that are most popular in RFIC design; standard spiral structure, patterned ground shield(PGS) structure to enhance quality factor, stacked structure to enable high inductance values in a given silicon area, multilayer structure to lower series resistance. Electromagnetic simulation, equivalent circuit, and parameter extraction processes have been verified based on measurement results. The extensive measurement and simulation results of the inductor library can be a great asset for low cost RFIC design and development.

• Journal of the Korean Vacuum Society
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• v.16 no.6
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• pp.439-445
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• 2007

SiGe integrated circuits are being used in the field of high-speed wire/wireless communications and microwave systems due to the RF/high-speed analog characteristics and the easiness in the fabrication. Reducing the resistance variation in SiGe thin film resistors results in enhancing the reliability of integrated circuits. In this paper, we investigate the causes that generate the resistance nonuniformity after the silicon-based thin film resistor was fabricated, and consider the counter plan against that. Because the Ti-B precipitate, which formed during the silicide process of the SiGe thin film resistor, gives rise to the nonuniformity of SiGe resistors, the boron ions should be implanted as many as possible. In addition, the resistance deviation increases as the size of the contact hole that interconnects the SiGe resistor and the metal line decreases. Therefore, the size of the contact hole must be enlarged in order to reduce the resistance deviation.

• ETRI Journal
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• v.37 no.1
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• pp.128-137
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• 2015

In this work, a fishbone-type transmission line employing a comb-type ground plane (FTLCGP) was fabricated on polyethersulfone (PES) substrate, and its RF characteristics were thoroughly investigated. According to the results, it was found that the FTLCGP on PES showed periodic capacitance values much higher than other types of transmission lines due to a coupling capacitance between the signal line and ground, which resulted in a reduction of wavelength and line width. Using the theoretical analysis, we also extracted the bandwidth characteristic of the FTLCGP on PES. According to the result, the FTLCGP structure showed a cut-off frequency of 280 GHz.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.258-258
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• 2006

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.64.2-64.2
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• 2011

Recently, Silicon Germanium (SiGe) alloys have been received considerable attention for their great potentials in advanced electronic and optoelectronic devices. Especially, microcrystalline SiGe is a good channel material for thin film transistor due to its advantages such as narrow and variable band gap and process compatibility with Si based integrated circuits. In this work, microcrystalline silicon-germanium films (${\mu}c$-SiGe) were deposited by DC/RF magnetron co-sputtering method using Si and Ge target on Corning glass substrates. The film composition was controlled by changing DC and RF powers applied to each target. The substrate temperatures were changed from $100^{\circ}C$ to $450^{\circ}C$. The microstructure of the thin films was analyzed by x-ray diffraction (XRD) and Raman spectroscopy. The analysis results showed that the crystallinity of the films enhances with increasing Ge mole fraction. Also, crystallization temperature was reduced to $300^{\circ}C$ with $H_2$ dilution. Hall measurements indicated that the electrical properties were improved by Ge alloying.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.1 s.92
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• pp.102-112
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• 2005

In this work, we developed fully integrated broadband MMIC chip set employing CSP(Chip Size Package) for K/Ka band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. $STO(SrTi_{3})$ capacitors were employed to integrate the DC biasing components on the MMIC, and LC parallel circuits were employed for DC feed and ESD protection. A pre-matching technique and RC parallel circuit were used to achieve a broadband matching and good stability fer the amplifier MMIC in K/Ka band. The amplifier CSP MMIC exhibited good RF performance over a wide frequency range in K/Ka band. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the K/Ka band.

• Journal of the Korean institute of surface engineering
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• v.36 no.1
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• pp.74-78
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• 2003

The corrosion failure of electronic devices has been a major reliability concern lately. This failure is an ongoing concern because of miniaturization of integrated circuits (IC) and the increased use of polymers in electronic packaging. Recently, plasma-polymerized cyclohexane films were considered as a possible candidate for a interlayer dielectric for multilever metallization of ultra large scale integrated (ULSI) semiconductor devices. In this paper the protective ability of above films as a function of deposition temperature and RF power in an 3.5 wt.% NaCl solution were examined by polarization measurement. The film was characterized by FTIR spectroscopy and contact angle measurement. The protective efficiency of the film increased with increasing deposition temperature and RF power, which induced the higher degree of cross-linking and hydrophobicity of the films.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.2
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• pp.294-301
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• 2000

One of the most important design parameters in a microwave radio transmitting system is to reduce spurious response from the output spectrum of the transmitting system. A Local oscillator (LO) is seldom totally pure and at the least contain some LO harmonic signals. A LO or any oscillator is a transmitter if provided with a suitable radiator, conduction, or leakage path. Where mixer is employed in the output of the LO mixer generated spurs can be increased by RF amplifier. To reduce LO leakage, notch filter or band pass filter has been conventionally used. In this paper, the leakage reduction(LR) signal, which has the same magnitude and the opposite phase with respect to LO leakage signal, is added to the output of mixer of the wireless LAN system. The LO leakage is reduced by 30 dB more than the conventional methods do. The proposed method is potentially suitable for low-cost, reliable, and simple application of monolithic microwave integrated circuits (MMICs)

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.196-203
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• 2004

A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.