• Title/Summary/Keyword: Quantum Circuit Optimization

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3D Circuit Visualization for Large-Scale Quantum Computing (대규모 양자컴퓨팅 회로 3차원 시각화 기법)

  • Kim, Juhwan;Choi, Byungsoo;Jo, Dongsik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.8
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    • pp.1060-1066
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    • 2021
  • Recently, researches for quantum computers have been carried out in various fields. Quantum computers performs calculations by utilizing various phenomena and characteristics of quantum mechanics such as quantum entanglement and quantum superposition, thus it is a very complex calculation process compared to classical computers used in the past. In order to simulate a quantum computer, many factors and parameters of a quantum computer need to be analyzed, for example, error verification, optimization, and reliability verification. Therefore, it is necessary to visualize circuits that can intuitively simulate the configuration of the quantum computer components. In this paper, we present a novel visualization method for designing complex quantum computer system, and attempt to create a 3D visualization toolkit to deploy large circuits, provide help a new way to design large-scale quantum computing systems that can be built into future computing systems.

Hierarchical Circuit Visualization for Large-Scale Quantum Computing (대규모 양자컴퓨팅 회로에 대한 계층적 시각화 기법)

  • Kim, JuHwan;Choi, Byung-Soo;Jo, Dongsik
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.05a
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    • pp.611-613
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    • 2021
  • Recently, research and development of quantum computers, which exceed the limits of classical computers, have been actively carried out in various fields. Quantum computers, which use quantum mechanics principles in a way different from the electrical signal processing of classical computers, have various quantum mechanical phenomena such as quantum superposition and quantum entanglement. It goes through a very complicated calculation process compared to the calculation of a classical computer for performing an operation using its characteristics. In order to utilize each element efficiently and accurately, it is necessary to visualize the data before driving the actual quantum computer and perform error verification, optimization, reliability, and verification. However, when visualizing all the data of various elements configured inside the quantum computer, it is difficult to intuitively grasp the necessary data, so it is necessary to visualize the data selectively. In this paper, we visualize the data of various elements that make up a quantum computer, and hierarchically visualize the internal circuit components of a quantum computer that are complicatedly configured so that the data can be observed and utilized intuitively.

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Optimization of LEA Quantum Circuits to Apply Grover's Algorithm (그루버 알고리즘 적용을 위한 LEA 양자 회로 최적화)

  • Jang, Kyung Bae;Kim, Hyun Jun;Park, Jae Hoon;Song, Gyeung Ju;Seo, Hwa Jeong
    • KIPS Transactions on Computer and Communication Systems
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    • v.10 no.4
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    • pp.101-106
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    • 2021
  • Quantum algorithms and quantum computers can break the security of many of the ciphers we currently use. If Grover's algorithm is applied to a symmetric key cipher with n-bit security level, the security level can be lowered to (n/2)-bit. In order to apply Grover's algorithm, it is most important to optimize the target cipher as a quantum circuit because the symmetric key cipher must be implemented as a quantum circuit in the oracle function. Accordingly, researches on implementing AES(Advanced Encryption Standard) or lightweight block ciphers as quantum circuits have been actively conducted in recent years. In this paper, korean lightweight block cipher LEA was optimized and implemented as a quantum circuit. Compared to the previous LEA quantum circuit implementation, quantum gates were used more, but qubits were drastically reduced, and performance evaluation was performed for this tradeoff problem. Finally, we evaluated quantum resources for applying Grover's algorithm to the proposed LEA implementation.

Resource Eestimation of Grover Algorithm through Hash Function LSH Quantum Circuit Optimization (해시함수 LSH 양자 회로 최적화를 통한 그루버 알고리즘 적용 자원 추정)

  • Song, Gyeong-ju;Jang, Kyung-bae;Seo, Hwa-jeong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.31 no.3
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    • pp.323-330
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    • 2021
  • Recently, the advantages of high-speed arithmetic in quantum computers have been known, and interest in quantum circuits utilizing qubits has increased. The Grover algorithm is a quantum algorithm that can reduce n-bit security level symmetric key cryptography and hash functions to n/2-bit security level. Since the Grover algorithm work on quantum computers, the symmetric cryptographic technique and hash function to be applied must be implemented in a quantum circuit. This is the motivation for these studies, and recently, research on implementing symmetric cryptographic technique and hash functions in quantum circuits has been actively conducted. However, at present, in a situation where the number of qubits is limited, we are interested in implementing with the minimum number of qubits and aim for efficient implementation. In this paper, the domestic hash function LSH is efficiently implemented using qubits recycling and pre-computation. Also, major operations such as Mix and Final were efficiently implemented as quantum circuits using ProjectQ, a quantum programming tool provided by IBM, and the quantum resources required for this were evaluated.

Effects of Hydrogen on the PWSCC Initiation Behaviours of Alloy 182 Weld in PWR Environments

  • Kim, H.-S.;Hong, J.-D.;Lee, J.;Gokul, O.S.;Jang, C.
    • Corrosion Science and Technology
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    • v.14 no.3
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    • pp.113-119
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    • 2015
  • Alloy 82/182 weld metals had been extensively used in joining the components of the PWR primary system. Unfortunately, there have been a number of incidents of cracking caused by PWSCC in Alloy 82/182 welds during the operation of PWR worldwide. To mitigate PWSCC, optimization of water-chemistry conditions, especially dissolved hydrogen (DH) and Zn contents, is considered as the most promising and effective remedial method. In this study, the PWSCC behaviours of Alloy 182 weld were investigated in simulated PWR environments with various DH content. Both in-situ and ex-situ oxide characterizations as well as PWSCC initiation tests were performed. The results showed that PWSCC crack initiation time was shortest in PWR water (DH: 30cc/kg). Also, high stress reduced crack initiation time. Oxide layer showed multi-layered structures consisted of the outer needle-like Ni-rich oxide layer, Fe-rich crystalline oxide, and inner Cr-rich inner oxide layers, which was not altered by the level of applied stress. To analyse the multi-layer structure of oxides, EIS measurement were fitted into an equivalent circuit model. Further analyses including TEM and EDS are underway to verify appropriateness of the equivalent circuit model.

Development of RSFQ Logic Circuits and Delay Time Considerations in Circuit Design (RSFQ 논리회로의 개발과 회로설계에 대한 지연시간 고려)

  • Kang, J.H.;Kim, J.Y.
    • Progress in Superconductivity
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    • v.9 no.2
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    • pp.157-161
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    • 2008
  • Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.

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RSFQ DFFC Circuit Design for Usage in developing ALU (ALU의 개발을 위한 RSFQ DFFC 회로의 설계)

  • 남두우;김규태;강준희
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2003.10a
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    • pp.123-126
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    • 2003
  • RSFQ (Rapid Single Flux Quantum) circuits are used in many practical applications. RSFQ DFFC (Delay Flip-Flop with complementary outputs) circuits can be used in a RAM, an ALU (Arithmetic Logic Unit), a microprocessor, and many communication devices. A DFFC circuit has one input, one switch input, and two outputs (output l and output 2). DFFC circuit functions in such way that output 1 follows the input and output 2 is the complement of the input when the switch input is "0." However, when there is a switch input "1."the opposite output signals are generated. In this work, we have designed an RSFQ DFFC circuit based on 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology. As circuit design tools, we used Xic, WRspice, and Lmeter After circuit optimization, we could obtain the bias current margins of the DFFC circuit to be above 32%.

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Photovoltaic Properties of Tandem Structure Consisting of Quantum Dot Solar cell and Small Molecule Organic Solar cell

  • Jang, Jinwoong;Choi, Geunpyo;Yim, Sanggyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.249.2-249.2
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    • 2015
  • Connecting two or more sub-cells is a simple and effective way of improving power conversion efficiency (PCE) of solar cells, and the theoretical efficiency of this tandem cell is known to reach 85~88% of the sum of the sub-cell's efficiencies. There are two ways of connecting sub-cells in the tandem structure, i.e. parallel and series connection. The parallel connection can increase the short circuit current (Jsc) and the series connection can increase the open circuit voltage (Voc). Although various tandem structures have been studied, the full use of incident light and optimization of cell efficiency is still limited. In this work, we designed series tandem solar cells consisting of lead sulfide (PbS) quantum dots/zinc oxide-based QDSC and zinc phthalocyanine (ZnPc)/C60-based small molecule OSCs. It is expected that the loss of the incident light is minimized because the absorption range of the PbS quantum dots and ZnPc is significantly different, and the Voc increases according to the Kirchhoff's law.

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A One-Kilobit PQR-CMOS Smart Pixel Array

  • Lim, Kwon-Seob;Kim, Jung-Yeon;Kim, Sang-Kyeom;Park, Byeong-Hoon;Kwon, O'Dae
    • ETRI Journal
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    • v.26 no.1
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    • pp.1-6
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    • 2004
  • The photonic quantum ring (PQR) laser is a three dimensional whispering gallery (WG) mode laser and has anomalous quantum wire properties, such as microampere to nanoampere range threshold currents and ${\sqrt{T}}$-dependent thermal red shifts. We observed uniform bottom emissions from a 1-kb smart pixel chip of a $32{\times}32$ InGaAs PQR laser array flip-chip bonded to a 0.35 ${\mu}m$ CMOS-based PQR laser driver. The PQR-CMOS smart pixel array, now operating at 30 MHz, will be improved to the GHz frequency range through device and circuit optimization.

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Development of Program counter through the optimization of RSFQ Toggle Flip-Flop (RSFQ Toggle Flip-Flop 회로의 최적화를 통한 Program Counter의 개발)

  • Baek Seung Hun;Kim Jin Young;Kim Se Hoon;Kang Joon Hee
    • Progress in Superconductivity and Cryogenics
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    • v.7 no.1
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    • pp.17-20
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    • 2005
  • We has designed, fabricated, and measured a Single flux quantum (SFQ) toggle flip-flop (TFF). The TFF is widely used in superconductive digital electronics circuits. Many digital devices, such as frequency counter, counting ADC and program counter be used TFF Specially, a program counter may be constructed based on TFF We have designed the newly TFF and obtained high bias margins on test. In this work, we used two circuit simulation tools, WRspice and Julia, as circuit optimization tools. We used XIC for a layout tool. Newly designed TFF had minimum bias margins of +/- $37\%$ and maximum bias margins of +/-$37\%$(enhanced from +/- $37\%$). The designed circuits were fabricated by using Nb technology The test results showed that the re-optimized TFF operated correctly on 100kHz and had a very wide bias margins of +/- $53\%$.