• Title/Summary/Keyword: Quantum Circuit

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Channel and Gate Workfunction-Engineered CNTFETs for Low-Power and High-Speed Logic and Memory Applications

  • Wang, Wei;Xu, Hongsong;Huang, Zhicheng;Zhang, Lu;Wang, Huan;Jiang, Sitao;Xu, Min;Gao, Jian
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.1
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    • pp.91-105
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    • 2016
  • Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

GQD layers for Energy-Down-shift layer on silicon solar cells by kinetic spraying method

  • Lee, Gyeong-Dong;Park, Myeong-Jin;Kim, Do-Yeon;Kim, Su-Min;Gang, Byeong-Jun;Kim, Seong-Tak;Kim, Hyeon-Ho;Lee, Hae-Seok;Gang, Yun-Muk;Yun, Seok-Gu;Hong, Byeong-Hui;Kim, Dong-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.422.1-422.1
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    • 2016
  • Graphene quantum dots (GQDs), a new kind of carbon-based photo luminescent nanomaterial from chemically modified graphene oxide (CMGO) or chemically modified graphene (CMG), has attracted extensive research attention in the last few years due to its outstanding chemical, optical and electrical properties. To further extended its potential applications as optoelectronic devices, solar cells, bio and bio-sensors and so on, intensive research efforts have been devoted to the CMG. However, the CMG, a suspension of aqueous, have problematic since they are prone to agglomeration after drying a solvent. In this study, we synthesized the GQDs from graphite and deposited on silicon substrate by kinetic spray. The photo luminescent properties of deposited GQD films were analyzed and compared with initial GQDs suspension. In addition, its carbon properties were investigated with GQDs solution properties. The properties of deposited GQD films by kinetic spray were similar to that of the GQDs suspension in water. We could provide a pathway for silicon-based silicon based device applications. Finally, the well-adjusted GQD films with photo luminescence effects will show Energy-Down-Shift layer effects on silicon solar cells. The GQD layers deposited at nozzle scan speeds of 40, 30, 20, and 10 mm/s were evaluated after they were used to fabricate crystalline-silicon solar cells; the results indicate that GQDs play an important role in increasing the optical absorptivity of the cells. The short-circuit current density (Jsc) was enhanced by about 2.94 % (0.9 mA/cm2) at 30 mm/s. Compared to a reference device without a GQD energy-down-shift layer, the PCE of p-type silicon solar cells was improved by 2.7% (0.4 percentage points).

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Space Radiation Effect on Si Solar Cells (우주 방사능에 의한 실리콘 태양 전지의 특성 변화)

  • Lee, Jae-Jin;Kwak, Young-Sil;Hwang, Jung-A;Bong, Su-Chang;Cho, Kyung-Seok;Jeong, Seong-In;Kim, Kyung-Hee;Choi, Han-Woo;Han, Young-Hwan;Choi, Yong-Woon;Seong, Baek-Il
    • Journal of Astronomy and Space Sciences
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    • v.25 no.4
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    • pp.435-444
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    • 2008
  • High energy charged particles are trapped by geomagnetic field in the region named Van Allen Belt. These particles can move to low altitude along magnetic field and threaten even low altitude spacecraft. Space Radiation can cause equipment failures and on occasions can even destroy operations of satellites in orbit. Sun sensors aboard Science and Technology Satellite (STSAT-l) was designed to detect sun light with silicon solar cells which performance was degraded during satellite operation. In this study, we try to identify which particle contribute to the solar cell degradation with ground based radiation facilities. We measured the short circuit current after bombarding electrons and protons on the solar cells same as STSAT-1 sun sensors. Also we estimated particle flux on the STSAT-l orbit with analyzing NOAA POES particle data. Our result clearly shows STSAT-l solar cell degradation was caused by energetic protons which energy is about 700keV to 1.5MeV. Our result can be applied to estimate solar cell conditions of other satellites.

Signal Level Analysis of a Camera System for Satellite Application

  • Kong, Jong-Pil;Kim, Bo-Gwan
    • Proceedings of the KSRS Conference
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    • 2008.10a
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    • pp.220-223
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    • 2008
  • A camera system for the satellite application performs the mission of observation by measuring radiated light energy from the target on the earth. As a development stage of the system, the signal level analysis by estimating the number of electron collected in a pixel of an applied CCD is a basic tool for the performance analysis like SNR as well as the data path design of focal plane electronic. In this paper, two methods are presented for the calculation of the number of electrons for signal level analysis. One method is a quantitative assessment based on the CCD characteristics and design parameters of optical module of the system itself in which optical module works for concentrating the light energy onto the focal plane where CCD is located to convert light energy into electrical signal. The other method compares the design\ parameters of the system such as quantum efficiency, focal length and the aperture size of the optics in comparison with existing camera system in orbit. By this way, relative count of electrons to the existing camera system is estimated. The number of electrons, as signal level of the camera system, calculated by described methods is used to design input circuits of AD converter for interfacing the image signal coming from the CCD module in the focal plane electronics. This number is also used for the analysis of the signal level of the CCD output which is critical parameter to design data path between CCD and A/D converter. The FPE(Focal Plane Electronics) designer should decide whether the dividing-circuit is necessary or not between them from the analysis. If it is necessary, the optimized dividing factor of the level should be implemented. This paper describes the analysis of the electron count of a camera system for a satellite application and then of the signal level for the interface design between CCD and A/D converter using two methods. One is a quantitative assessment based on the design parameters of the camera system, the other method compares the design parameters in comparison with those of the existing camera system in orbit for relative counting of the electrons and the signal level estimation. Chapter 2 describes the radiometry of the camera system of a satellite application to show equations for electron counting, Chapter 3 describes a camera system briefly to explain the data flow of imagery information from CCD and Chapter 4 explains the two methods for the analysis of the number of electrons and the signal level. Then conclusion is made in chapter 5.

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Photoelectric Properties of PbTe/CuPc Bilayer Thin Films (PbTe/CuPc 이층박막의 광전 특성)

  • Lee, Hea-Yeon;Kang, Young-Soo;Park, Jong-Man;Lee, Jong-Kyu;Jeong, Jung-Hyun
    • Journal of Sensor Science and Technology
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    • v.7 no.1
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    • pp.67-72
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    • 1998
  • The crystallized CuPc and PbTe films are formed by thermal evaporation and pulsed ArF excimer laser ablation. Structural and electrical properties of thin film is observed by XRD and current-voltage(I-V) curves. From XRD analysis, both PbTe and CuPc thin films show a-axis oriented structure. For the measurement of photovoltaic effect, the transverse current-voltage curve of CuPc/Si, PbTe/Si and PbTe/CuPc/Si junctions have been analyzed in the dark and under illumination. The PbTe/CuPc/Si junction exthibits a strong photovoltaic characteristics with short circuit current($J_{sc}$) of $25.46\;mA/cm^{2}$ and open-circuit voltage($V_{oc}$) of 170 mV. Quantum efficiency and power conversion efficiency are calculated to be 15.4% and $3.46{\times}10^{-2}$, respectively. Based on the results of QE and ${\eta}$, the photocurrent process of PbTe/CuPc/Si junction can be explained as following three effective steps; photocarrier generation in the CuPc layer, carrier separation at PbTe/CuPc interface, and finally a transportation of electrons through the PbTe layer.

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SPICE Simulation of All-Optical Transmitter/Receiver Circuits Configured with MQW Optical Modulators and FETs (다층 양자우물구조 광 변조기와 전계효과 트랜지스터를 사용한 광 송/수신기회로의 SPICE 모사)

  • 이유종
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.05a
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    • pp.420-424
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    • 1999
  • In this paper, an optical switching circuit and several types of all-optical transmitter/receiver circuits which are configured with photodiodes, multiple quantum-well(MQW) optical modulators, and field-effect transistors(FETs) were simulated using PSPICE and their results of these are examined and discussed. 20 $\mu\textrm{m}$ ${\times}$ 20 $\mu\textrm{m}$ of window size was used for the optical modulators and 100 $\mu\textrm{m}$ wide FETs with the transconductance value of 55 mS/mm were used for the simulations. Simulation results clearly show that in order for the high speed operation of the all-optical circuits, the size of each device should be minimized to reduce the parasitic capacitance, the circuits should be designed to operate at the wavelength where the resposivity of photodiodes becomes the maximum peak, and the use of short, high-intensity input optical signal beams is very advantageous.

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High-Speed Digital/Analog NDR ICs Based on InP RTD/HBT Technology

  • Kim, Cheol-Ho;Jeong, Yong-Sik;Kim, Tae-Ho;Choi, Sun-Kyu;Yang, Kyoung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.3
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    • pp.154-161
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    • 2006
  • This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

A Study of Characterization of Multi-Crystalline Silicon Solar Cell Module using by RIE and Wet Texturing for BIPV (BIPV용 건식 및 습식 텍스쳐링 공정에 의한 다결정실리콘 태양전지 모듈 특성 연구)

  • Seo, Il-Won;Yun, Myung-Soo;Jo, Tae-Hoon;Son, Chan-Hee;Cha, Sung-Ho;Lee, Sang-Du;Kwon, Gi-Chung
    • New & Renewable Energy
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    • v.9 no.2
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    • pp.30-39
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    • 2013
  • Multi-crystalline silicon solar cells is not exist a specific crystal direction different from single crystalline silicon solar cells. In functional materials, therefore, isotropic wet etching of mc-Si solar cell is easy the acid solution rather than the alkaline solution. The reflectance of wet texturing process is about 25% and the reflectance of RIE texturing process is achieved less than 10%. In addition, wet texturing has many disadvantages as well as reflectance. So wet texturing process has been replaced by a RIE texturing process. In order to apply BIPV, RIE and wet textured multi-crystalline silicon solar cell modules was manufactured by different kind of EVA sheet. Moreover, in case of BIPV, the short circuit current characteristics according to the angle of incidence is more important, because the installation of BIPV is fixed location. In this study, we has measured SEM image and I-V curve of RIE and wet textured silicon solar cell and PV module. Also we has analyzed quantum efficiency characteristics of RIE and wet textured silicon solar cell for PV modules depending on incidence angle.

Properties of Silicon Solar Cells with Local Back Surface Field Fabricated by Aluminum-Silicon Eutectic Alloy Paste (알루미늄-실리콘 공융 조성 합금 페이스트를 이용한 국부 후면 전계 태양전지 특성 분석)

  • Choi, Jae-Wook;Park, Sungeun;Bae, Soohyun;Kim, Seongtak;Park, Se Jin;Park, Hyomin;Kang, Yoonmook;Lee, Hae-Seok;Kim, Donghwan
    • Current Photovoltaic Research
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    • v.4 no.4
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    • pp.145-149
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    • 2016
  • Characteristic of aluminum-silicon alloy paste which is applied on the rear side of PERC cell was investigated. The paste was made by aluminum-silicon alloy with eutectic composition to avoid the formation of void which is responsible for the degradation of the open-circuit voltage. Also, the glass frit component of the paste was changed to improve the adhesion of aluminum-silicon paste. We observed the formation of void and local back surface field between aluminum electrode and silicon base by SEM. The light IV, quantum efficiency and reflectance of the solar cells were characterized and compared for each paste.

Characteristics of two extended-cavity diode lasers phase-locked with a 9.2 CHz frequency offset (9.2 GHz 주파수 차이로 위상잠금된 두 외부 공진기 다이오드 레이저의 제작 및 특성 조사)

  • Kwon, Taek-Yong;Shin, Eun-Ju;Yoo, Dae-Hyuk;Lee, Ho-Sung;In, Min-Kyo;Cho, Hyuk;Park, Sang-Eon
    • Korean Journal of Optics and Photonics
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    • v.13 no.6
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    • pp.543-547
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    • 2002
  • We have constructed two extended-cavity diode lasers which are phase-locked with a 9.2 GHz frequency offset. We adopted a digital servo circuit for the phase-locking. The relative linewidth of the phase-locked lasers was less than 2 Hz. Using the measured beat spectrum, we found the carrier concentration to be about 93 %. We measured phase noise and relative frequency stability of the lasers. The Allan deviation at the gate time of 20 s was $2.7{\times}10^{-19}$.