• Title/Summary/Keyword: Pwm

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Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters

  • Nguyen, Nho-Van;Quach, Hai-Thanh;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.548-558
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    • 2012
  • In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

A Novel Modulation Strategy Based on Level-Shifted PWM for Fault Tolerant Control of Cascaded Multilevel Inverters (Cascaded 멀티레벨 인버터의 고장 허용 제어를 위한 Level-Shifted PWM 기반의 새로운 변조 기법)

  • Kim, Seok-Min;Lee, June-Seok;Lee, Kyo-Beum
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.5
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    • pp.718-725
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    • 2015
  • This paper proposes a novel level-shifted PWM (LS-PWM) strategy for fault tolerant cascaded multilevel inverter. Most proposed fault-tolerant operation methods in many of studies are based on a phase-shifted PWM (PS-PWM) method. To apply these methods to multilevel inverter systems using LS-PWM, two additional steps will be implemented. During the occurrence of a single-inverter-cell fault, the carrier bands scheme is reconfigured and modulation levels of inverter cells are reassigned in this proposed fault-tolerant operation. The proposed strategy performs balanced three-phase line-to-line voltages and line currents when a switching device fault occurs in a cascaded multilevel inverter using LS-PWM. Simulation and experimental results are included in the paper to verify the proposed method.

A Study on the Algorithm for Single Phase Control of IGBT PWM Rectifier (IGBT PWM Rectifier의 각상 개별제어 알고리즘에 관한 연구)

  • Kim, Seung-Ho;Park, Jae-Beom;Tae, Dong-Hyun;Kim, Seung-Jong;Song, Joong-Ho;Rho, Dae-Seok
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.4
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    • pp.26-33
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    • 2016
  • Recently, the use of transformer-less UPS has increased to improve the efficiency of UPS. However, transformer-less UPS is required in three-phase four-wire input IGBT PWM rectifier and the existing three-phase three-wire PFC algorithm cannot be applied in the three-phase four-wire system due to the neutral current problem of UPS input. To control the three-phase four-wire input IGBT PWM rectifier, there are two existing algorithms: 3D SVM and single phase control method. These two algorithms have advantages/disadvantages in controlling the rectifier. The single phase control method is unstable for controlling the rectifier and the 3D SVM method has a problem that must increase the L value of the input-side inductor considerably. Therefore, this paper proposes digital single phase control technology and another new algorithm considering the d-q control, to improve the characteristics of the existing control algorithm. In addition, this paper performed a simulation and experiment based on the proposed control algorithm. The simulation results showed that the proposed technology can control three-phase four-wire IGBT PWM rectifier in a stable manner and can also reduce the neutral current. The proposed algorithm is a useful tool for controlling the three-phase four-wire IGBT PWM rectifier.

Design of a PWM-Controlled Driving Device for Backlightsof LED Systems (LED 광원의 백 라이트에 대한 PWM 제어 및 구동 장치 설계)

  • Um, Kee-Hong
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.1
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    • pp.245-251
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    • 2015
  • In this paper, we present a design of PWM-controlled driving device for backlights in LED systems. The system can control either the brightness of the entire screen of backlights of LCD driven by LED or illumination or contrast of each partial segment of the entire screen. The PWM-controlled driving device includes the shift register that shifts the series data according to the clock signal prior to the generation of parallel data. It is also is comprised of a number of registers, a number of counters, a number of comparators, and a number of synchronizing gates (producing the PWM-controlled signals). The proposed device for backlights in LED systems can generate the PWM-controlled signal with a high degree of resolution without the increase of clock frequency. It also contains the PWM-controlled circuit that disperses and restrains the quantized noise.

A Study on The MRA PWM Technique Using the Trapezoidal Waveform at Voltage Source Inverter(VSDI) (전압형 인버터(VSI)에서 사다리꼴파형을 이용한 MRA PWM 기법에 관한 연구)

  • 한완옥;원영진;이성백
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.7 no.2
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    • pp.36-40
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    • 1993
  • In order to improve complicated construction and complex control which are disadvantage of optimal PWM technique aimed at harmonic elimination method, this paper presented MRA(Model Reference Adaptive) PWM technique that gatmg signal of inverter is generated by comparing the reference signal with the induced feedback signal at the reference model of load. Design of controller is composed of microprocessor and analog circuit. MRA PWM technique used in the paper is able to compensate the degradation of voltage efficiency to be generated by the ratio of the output voltage to the DC supply voltage being low for using conventional sinusoidal PWM technique. When the trapezoidal signal is employed as the reference signal. the low order harmonics of line current can be reduced and the switching pattern is made by on-line computation using comparatively simple numerical analysis.

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An Optimized PWM Switching Strategy for an Induction Motor Voltage Control (전압제어 유도 전동기를 위한 최적 PWM 스위칭 방법)

  • Han, Sang-Soo;Chu, Soon-Nam
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.5
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    • pp.922-930
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    • 2009
  • An optimized PWM switching strategy for an induction motor voltage control is developed and demonstrated. Space vector modulation in voltage source inverter offers improved DC-bus utilization and reduced commutation losses and has been therefor recognized the preferred PWM method especially in case of digital implementation. An optimized PWM switching strategy for an induction motor voltage control consists of switching between the two active and one zero voltage vector by using the proposed optimal PWM algorithm. The preferred switching sequence is defined as a function of the modulation index and period of a carrier wave. The sequence is selected by using the inverter switching losses and the current ripple as the criteria. For low and medium power application, the experimental results indicate that good dynamic response and reduced harmonic distortion can be achieved by increasing switching frequency.

Common-mode Voltage Reduction of Three Level Four Leg PWM Converter (3레벨 4레그 PWM 컨버터의 커먼 모드 전압 저감)

  • Chee, Seung-Jun;Ko, Sanggi;Kim, Hyeon-Sik;Sul, Seung-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.6
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    • pp.488-493
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    • 2014
  • This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

A Neural Network Design using Pulsewidth-Modulation (PWM) Technique (펄스폭변조 기법을 이용한 신경망회로 설계)

  • 전응련;전흥우;송성해;정금섭
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.1
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    • pp.14-24
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    • 2002
  • In this paper, a design of the pulsewidth-modulation(PWM) neural network with both retrieving and learning function is proposed. In the designed PWM neural system, the input and output signals of the neural network are represented by PWM signals. In neural network, the multiplication is one of the most commonly used operations. The multiplication and summation functions are realized by using the PWM technique and simple mixed-mode circuits. Thus, the designed neural network only occupies the small chip area. By applying some circuit design techniques to reduce the nonideal effects, the designed circuits have good linearity and large dynamic range. Moreover, the delta learning rule can easily be realized. To demonstrate the learning capability of the realized PWM neural network, the delta learning nile is realized. The circuit with one neuron, three synapses, and the associated learning circuits has been designed. The HSPICE simulation results on the two learning examples on AND function and OR function have successfully verified the function correctness and performance of the designed neural network.

Minimization of Current Ripple and Analysis of PWM methods for the Control of BLDCM (BLDC 모터 제어를 위한 PWM 분석과 전류리플 최소화)

  • Oh, Tae-Seok;Shin, Yun-Su;Her, Nam-Euk;Kim, Il-Hwan
    • Proceedings of the KIEE Conference
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    • 2008.04a
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    • pp.242-243
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    • 2008
  • 사다리꼴 역기전력을 갖는 BLDC 전동기 제어는 구형파 전류를 인가함으로서 DC 모터와 같은 제어를 할 수 있어 많은 응용 분야에 사용되고 있다. 구형파 전류를 인가하기 위하여 연구된 PWM방식을 분석해 보면 몇 가지 문제점을 가지고 있다. 기존의 연구내용으로는 유니폴라 PWM방법, 바이폴라 PWM 방법, 하이브리드 PWM 방법이 있으나 PWM을 정확히 분석해보면 원하는 전압을 인가할 수 없는 부분이 있음을 알 수 있다. 특히 방향을 바꾸는 시점이나 속도를 급격히 줄이는 부분에서는 원하는 전압이 인가되지 않음을 알 수 있다. 본 논문에서는 이러한 문제점을 분석하고 정확한 전압이 인가될 수 있는 방법을 제안한다.

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An Optimal PWM Strategy for IGBT-based Traction Inverters (철도용 IGBT인버터를 위한 최적 PWM 전략)

  • 강기호;김영민
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.4
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    • pp.332-341
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    • 1999
  • 철도용 전동기는 작은 크기와 중량에 비해 큰 추진력(토크)을 필요로 하지만, 전철의 입력전원 시스템의 특유한 성질로 입력전압이 주기적으로 부족하다. 따라서 전압이용률을 최대화할 수 있는 과변조 PWM이 필요하다. 또 철도용 IGBT 인버터의 스위칭 주파수는 기존의 GTO인버터보다 2배 이상 크므로 철도용 IGBT 인버터 전용의 새로운 동기화 전략이 필요하다. 본 논문은 'Min/Max PWM'을 과변조 영역으로 선형 확장하는 과변조 PWM기법과 최적 동기화법을 혼합한 철도용 IGBT 인버터를 위한 최적 PWM 전략을 제안한다. 전동기-관성부하 모델을 대상으로 시뮬레이션한 결과와 축소모델 실험 결과는 본 전략이 타당함을 보여준다.

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