• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.186-187
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• 2007

In this work, a temperature stable PWM(Pulse width modulation) circuit is proposed. The designed PWM circuit has a temperature dependent current source and a temperature independent voltage to compensate electrical characteristics with operating temperature. The variation of driving current is from about 4% to -6% in the temperature range $0^{\circ}C\;to\;70^{\circ}C$ compared to the current at the room temperature. The variation of bandgap voltage reference is from about 1.3% to -0.2% with temperature when the supply voltage is 3.3 volts. From simulation results, the variation of output pulse width is less than from 0.86% to -0.38% in the temperature range $0^{\circ}C\;to\;70^{\circ}C$.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.12B no.1
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• pp.37-43
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• 2002

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5㎾ prototype boost converter operating at 40KHz.

• Journal of Power Electronics
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• v.1 no.2
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• pp.71-77
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• 2001

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of DC to DC PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of DC to DB PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5 kW prototype converter operating at 40 kHz.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.8
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• pp.120-129
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• 1998

In this paper represented uninterruptible power sypply(UPS) equipment maintaining constant output voltage, using a pulse width modulation(PWM) voltage fed inverter, as power source disconnection, voltage variation and output current variation with load variation. This system is driven by being synchronized voltage fed inverter and AC source, and in the steady state of power source charge battery connected to DC side with solar cell using a Photovoltaic (PV) that it was so called constant voltage charge. In addition, better output waveform was generated because of PWM(pulse width Modulation) method, and it was Proved to test by experiment maintained constant output voltage regardless of AC source disconnection, load variation, and voltage variation of AC power source.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.4
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• pp.386-398
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• 1987

This paper is proposed the Suboptimal PAWM(Pulse Amplitude Width Modulation) for minimize harmonic effects generated by switching operation of PWM Inverter. This strategy determine one switching pattern at a fixed point(fundamental) voltage u1=1.2) which THD(Total Harmonic Distortion) are minimized in the suboptimal PWM strategy, and controls only frequency in the inverter while voltage control is carried out by DC Chopper in the DC Link. This strategy is applied at VSD(Variable Speed Drive) of Three phase induction moter, and acoustic noise of motor, line to line voltage and current of inverter, current harmonic spectrum was estimated and also compared with other switching strategy. From the results, the validity of this strategy can be verified.

• Smart Media Journal
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• v.8 no.1
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• pp.51-58
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• 2019

This paper describes a gesture application to controlling the special effects of physical devices for 4D contents using the PWM (Pulse Width Modulation) method. The user operation recognized by the infrared sensor is interpreted as a command for 3D content control, several of which manipulate the device that generates the special effect to display the physical stimulus to the user. With the content controlled under the NUI (Natural User Interface) technique, the user can be directly put into an immersion experience, which leads to provision of the higher degree of interest and attention. In order to measure the efficiency of the proposed method, we implemented a PWM-based real-time linear control system that manages the parameters of the motion recognition and animation controller using the infrared sensor and transmits the event.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2843-2846
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• 2003

This paper proposes a PWM(Pulse Width Modulation) circuit using CMOS OTA with a single-voltage supply. The OTA employed has an input stage which consists of a pair of two MOSFETs operating in plural operation regions. The MOSFETs work complemetarily and realize a rail-to-rail input range. The input stage requires no matching of an n-channel type input circuit and a p-channel type input circuit unlike conventional rail-to-rail input stages because the input stage is realized by single channel type MOSFETs. In order to confirm the validity of the proposed circuit, it is simulated by H-SPICE program. Futhermore, the proposed circuit will be integrated on chip using 0.35 $\mu\textrm{m}$ CMOS technology.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1197-1207
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• 2014

Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 1995.10a
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• pp.80-84
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• 1995

ABSTRACT - This paper presents a software based 3 phase 5 level pulse-width modulation(PWM) inverter to reduce total harmonic distortion. The proposed modulation technique can reduce total harmonic distortion and significantly improve the performance of the inverter. In the modulation mode where the frequency ratio is 36 and modulation index is 1.2∼2.0, harmonic components have been mostly eliminated and the magnitude of fundamental component have been maximized by the 3 phase 5 level PWM inverter.

• Journal of Power Electronics
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• v.19 no.4
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.