• International Journal of Reliability and Applications
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• v.12 no.2
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• pp.95-102
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• 2011

This paper uses the auto regression model to modeling failure number of a bus fleet. The fitted model can be used to predict the failure number in the future. A numerical example is presented to illustrate the modeling process and the appropriateness of the fitted model. At last, some possible applications of the model are discussed.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.829-831
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• 2003

In the present study, the electroless plating method was applied instead of the sputtering as a formation method of metallic bus electrodes. No additional blackening step is needed in this method since this process provides a metallic seed layer with black color by a single step. The parameters which affects color and morphology of the metallic seed layer in the electroless plating solution were investigated

• Proceedings of the Optical Society of Korea Conference
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• 2008.02a
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• pp.397-398
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• 2008

We have developed simplified processes for the formation of insulators, cathode separators and bus electrodes in PMOLEDs. The insulators and cathode separators are patterned simultaneously by a single layer of image reversal photoresist. And, the bus electrodes of low resistance are formed by the cathode separator and cathode metal. Using these simplified processes, we fabricated 1.17" $96{\times}RGB{\times}96$ panels and analyzed their performance and reliability.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.653-654
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• 2006

A Pre-emphasis transmitter for DRAM bus system has achieved 3.2Gbps/pin operation at 1.8V supply voltage with 0.18um CMOS process. The transmitter has 800MHz PLL to generate 4 phase clocks. The 4 phase clocks are used for input clock of PRBS and multiplexing. One tap pre-emphasis is used to reduce inter symbol interference (ISI) caused by channel low pass effects. The analog calibration makes the optimized driver impedance independent with the PVT variation.

• Journal of Korean Society of Transportation
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• v.30 no.4
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• pp.21-32
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• 2012

Exclusive bus lane (EBL) is typically located in the roadway median, and is accessed by weaving across the GPLs(general purpose lanes) before entering from the left lane of the GPLs. To maximize the potential for successful EBL operations, a critical design issue that requires special attention is the length of bus weaving section before entering EBL. The process of developing guidelines for the length of bus weaving section can be supported by a sensitivity analysis of performance measure (safety) with respect to the bus weaving distance. However, field data are difficult to obtain due to inherent complexity in creating performance measure (safety) samples under various interesting flows and bus weaving distance that are keys to research success. In this paper, VISSIM simulation is applied to simulate the operation of roadway weaving areas with EBL, and based on vehicle trajectory data from microscopic traffic simulation models, the Surrogate Safety Assessment Model (SSAM) computes the number of surrogate conflicts (or degree of safety) with respect to the bus weaving distance. Then, a multiple linear regression (MLR) model using safety data (number of surrogate conflicts) is developed. Finally, guidelines for bus weaving distance are established based on the developed MLR. Developed guidelines explicitly indicate that a longer bus weaving distance is required to maintain desired safety as weaving volume increases.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.31 no.5D
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• pp.679-687
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• 2011

Implementation of semi-public management system of intra-city bus achieve excellent results but there are some side effects like increase of the fatal traffic accidents. This study tries to develop decision making model of measures of reducing traffic accidents following implementation of semi-public management system of intra-city bus. And survey with traffic experts and analytic hierarchy process are used for data survey and analysis. Quantitative measures and qualitative measures are suggested as high assessment items of AHP. Quantitative measures of low assessment items composed of a raise in the number of bus and safety device installation, facility supplement of bus stop, supplement of pedestrian protection facility, traffic safety assessment and supplement. Qualitative measures composed of system organization, redesign bus route, reinforcement of education, campaign and enforcement. The results of this study are as follows. First, the result turns out more weights are calculated on quantitative measures than on qualitative measures. Second, It is turned out in order of facility supplement of bus stop and traffic safety assessment and supplement as the quantitative measures. Third, as qualitative measures, system organization and redesign bus route are in the order. The results of this study are considered to be a basic data which can be referred if measures on the decrease of traffic accident are established and implemented in other cities and provinces.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.11 no.2
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• pp.52-57
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• 2012

In this paper describe configuration about QCM system for image processing device. It presents that QCM's image processing board video from the camera recognized by the PLC's battery removable exact location coordinates to the robot image processing technology to deliver. In addition, QCM video image processing technology for improved data reliability is described. In this paper define the landmarks of battery for obtaining the location coordinates and verify battery the location coordinates acquisition process from field tests of the QCM/QTPE-BUS Battery Exchange System.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1836-1839
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• 2005

We have developed Ethernet based real-time communication systems called "Vnet/IP" for DCS which is the control system for process automation. This paper describes the features and the technologies of the ASIC which is utilized in the communication interface hardware for Vnet/IP. Vnet/IP has been developed for mission-critical communications. Hence it has real-time feature, high reliability and precise time synchronization capability. At the same time, it is able to deal with standard protocols without influence on mission-critical communications. The communication interface hardware has a host interface and dual redundant network interfaces. The host interface can be chosen PCI-bus or R-bus which is the proprietary internal bus developed for the high reliable redundant controller. Each network interface is a RJ45 connection with 1Gbps maximum in compliance with IEEE802.3.

• International Journal of Aeronautical and Space Sciences
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• v.1 no.2
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• pp.30-42
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• 2000

On-orbit thermal environment test of KOMPSAT was performed in early 1999. An analysis of the test data are addressed in this paper. For the thermal-environmental simulation of spacecraft bus, an artificial heating through the radiator zones and onto some critical heat-dissipating electronic boxes was made by Absorbed-heat Flux Method. Test data obtained in terms of temperature history were reduced into flight heater duty cycles and converted into the total electrical power required for spacecraft thermal control. Verification result of flight heaters dedicated to the bus thermal control is presented. Additionally, an exhaustive heating-control process for maintaining the spacecraft thermally safe and for realistic simulation of the orbital-thermal environment during the test are graphically shown. Qualitative suggestions to post-test model correlation are given in consequency of the analysis.

• The Transactions of the Korea Information Processing Society
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• v.6 no.8
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• pp.2196-2203
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• 1999

This paper describes the bus scheduling problem and register optimization method in datapath synthesis. Scheduling is process of operation allocation to control steps in order to minimize the cost function under the given circumstances. For that purpose, we propose some formulations to minimize the cost function for bus assignment to get an optimal and minimal cost function in hardware allocations. Especially, bus and register minimization technique are fully considered which are the essential topics in hardware allocation. Register scheduling is done after the operation and bus scheduling. Experiments are done with the DFG model of fifth-order digital ware filter to show its effectiveness. Structural integer programming formulations are used to solve the scheduling problems in order to get the optimal scheduling results in the integer linear programming environment.