• ETRI Journal
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• 제19권2호
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• pp.35-47
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• 1997

A power amplifier operating at 3.3 V has been developed for CDMA/AMPS dual-mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESF from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two-tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than -26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be -33 dBc at a high output power of 26 dBm.

• 반도체디스플레이기술학회지
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• 제21권2호
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• pp.101-106
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• 2022

In this paper, WBG semiconductor such as SiC and GaN were applied as power switches for LCL circuit that can be applied to satellite power systems and the test results of the LCL circuit are reported. P-channel MOSFET and N-channel MOSFET, which were generally used in the conventional LCL circuit, were applied together to expand the utility of the test results. The design and stability evaluation were performed using a Micro Cap circuit simulation program. For the test circuit, a module using each switch was manufactured, and a total of 5 modules were manufactured and the steady state and transient state characteristics were compared. From the experimental results, the LCL circuit for power supply of the satellite power system constructed in this paper satisfied the constant current and constant voltage conditions under various operating conditions. The P-channel MOSFET showed the lowest efficiency characteristics, and the three N-channel switches of Si, SiC and GaN showed relatively high efficiency characteristics of up to 99.05% or more. In conclusion, it was verified that the on-resistor of the switch had a direct effect on the efficiency and loss characteristics.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.343-344
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• 2012

In high power PV generation system, the solar cell normally generates wide output voltage depending on the insolation, cell's temperature and shade effect. This paper will propose a high efficiency converter allowing the wide input voltage to supply stable voltage with the controller and operation for the PV generation system. The proposed converter consists of two stages comprising SEPIC with a coupled inductor and LLC, which generates 24 V of output at the final output terminal. In this paper, a design method and experimental results with a test-bed of 50 W will be presented to validate the proposed converter.

• 반도체디스플레이기술학회지
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• 제18권4호
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• pp.18-24
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• 2019

In this paper, expandable bobbin type multiple integrated coupled-inductor applied 4-paralled switching rectifier was proposed. To design the proposed inductor easily, inductance designing formula was derived through magnetic circuit analysis of the 4-paralleled integrated coupled-inductor. Furthermore, to verify practicality of the proposed inductor, it was applied in 600W class 4-paralleled interleaved switching rectifier, and the steady-state characteristics of the proposed inductor and discrete inductors were compared. Consequently, it was showed that the proposed inductor can replace the conventional discrete inductors with alternative electrical characteristic standard, hence miniaturization of the SMPS can be achieved. From the test result, test circuit with the proposed inductor showed maximum 97.1% of power conversion efficiency and under 18W of power loss where the circuit with discrete inductors showed 96.7% and 20W respectively.

• 한국산학기술학회논문지
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• 제15권11호
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• pp.6821-6829
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• 2014

자동차에서 반도체 소자의 사용이 증가하고 있으며 특히 친환경자동차의 구동장치 부품으로서 고내압 스위칭 사용 증가가 예상된다. 그러나 고내압 소자의 경우는 신뢰성 시험을 하기 위한 장비가 국산화 되어 있지 않다. 그러므로 고내압 소자를 시험하기 위한 전원장치의 개발을 위하여 관련 시험규격을 분석하였다. 특히 자동차용 반도체 신뢰성 시험을 위한 AEC(Automotive Electronic Council) Q101에서 시험항목을 분석하여 개발이 필요한 전원장치의 사양을 결정하였다. 주회로는 풀브리지 컨버터로 선정하였으며 주어진 장치 사양에 따라 각종 변수를 설계하였고, 회로 변수의 적절성은 시뮬레이션을 통하여 검증하였다. 또한 전력부의 병렬운전. 패턴 운전을 위한 인터페이스를 설계하였다. 이를 통해 개발된 제품은 시험을 통하여 특성을 검증하였다.

• 전력전자학회논문지
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• 제27권3호
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• pp.206-213
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• 2022

This paper presents setting up a laboratory-scale testbed to estimate the aging of power MOSFET devices and integrated power modules by measuring its on-state voltage and current. Based on the aging mechanisms of the component inside the power module (e.g., bond-wire, solder layer, and semiconductor chip), a system to measure the on-state resistance of device-under-test (DUT) is designed and experimented: a full-bridge circuit applies current stress to DUT, and a temperature chamber controls the ambient temperature of DUT during the aging test. The on-state resistance of SiC MOSFET measured by the proposed testbed was increased by 2.5%-3% after 44-hour of the aging test.

• 마이크로전자및패키징학회지
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• 제30권1호
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• pp.1-16
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• 2023

전기차용 전력변환모듈의 성능향상 요구와 종래의 Si 전력반도체의 한계 극복을 위해 차세대 전력반도체인 wide-bandgap (WBG) 기반 전력반도체로의 전환이 가속화되고 있다. WBG 전력반도체로의 전환을 위해 전력변환모듈 패키징 소재 역시 높은 고온 내구성을 요구받고 있다. 전력변환모듈 패키징 공정 중 하나인 Ag 소결 다이접합 기술은 종래의 고온용 Pb 솔더링의 대체 기술로 주목받고 있다. 본 논문에서는 Ag 소결 다이접합 기술 관련 최신 연구동향에 대해 소개하고자 한다. 소결 다이접합 공정 조건에 따른 접합부 특성을 비교하고 Ag 소결층의 3차원 이미지 구현에 따른 다공성 Ag 소결 접합부의 물성 측정 방법론에 대해 고찰하였다. 또한 열충격 및 파워사이클 신뢰성 평가 연구동향을 분석하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.83-83
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• 2009

We studied about the effect of newly developed etchant for spacer etch process in gate patterning. With the 110nm CMOS technology, first, we changed the gate pattern size and investigated the variation of spacer etch profile according to the difference in gate length. Second, thickness of spacer nitride was changed and effect of etch ant on difference in nitride thickness was observed. In addition to these, spacer etch power was added as test item for variation of etch profile. We investigated the etch profiles with SEM and TEM analysis was used for plasma damage check. With these results we could check the process margins for gate patterning which could hold best performance and choose the condition for best spacer etch profile.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2005년도 춘계 학술대회
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• pp.63-66
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• 2005

A soft error rate neutrons is a growing problem for integrated circuits with technology scaling. In the acceleration test with high-density neutron beam, a latch-up prohibits accurate estimations of the soft error rate (SER). This paper presents results of analysis for the latch-up characteristics in the circumstance corresponding to the acceleration SER test for SRAM. Simulation results, using a two-dimensional device simulator, show that the deep p-well structure has better latch-up Immunity compared to normal twin and triple well structures. In addition, it is more effective to minimize the distance to ground power compared with controlling a path to the $V_{DD}$ power.

• 반도체디스플레이기술학회지
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• 제21권1호
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• pp.148-154
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• 2022

As the 4th industrial age approaches, the demand for semiconductors is increasing enough to be used in all electronic devices. At the same time, semiconductor technology is also developing day by day, leading to ultraprecision and low power consumption. Semiconductors that keep getting smaller generate heat because the energy density increases, and the generated heat changes the shape of the semiconductor package, so it is important to manage. The temperature change is not only self-heating of the semiconductor package, but also heat generated by external damage. If the package is deformed, it is necessary to manage it because functional problems and performance degradation such as damage occur. The package burn in test in the post-process of semiconductor production is a process that tests the durability and function of the package in a high-temperature environment, and heat dissipation performance can be evaluated. In this paper, we intend to review a new material formulation that can improve the performance of the adapter, which is one of the parts of the test socket used in the burn-in test. It was confirmed what characteristics the basic base showed when polyamide, a high-molecular material, and alumina, which had high thermal conductivity, were mixed for each magnification. In this study, functional evaluation was also carried out by injecting an adapter, a part of the test socket, at the same time as the specimen was manufactured. Verification of stiffness such as tensile strength and flexural strength by mixing ratio, performance evaluation such as thermal conductivity, and manufacturing of a dummy device also confirmed warpage. As a result, it was confirmed that the thermal stability was excellent. Through this study, it is thought that it can be used as basic data for the development of materials for burn-in sockets in the future.