• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.28-29
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• 2006

When photovoltaic module is used for a long time, its performance decreases due to several reasons. In this paper, we focus on the possibilities mainly contributing to the degraded efficiency of the polycrystalline silicon photovoltaic modules. The analysis is based on the modules that have been used for 15 years. These are two main reasons that cause the efficiency degradation, the corrosion and thermal decomposition. The former phenomenon of electrode is mainly due to the moisture from damaged back sheet in some module. However the other reason of the degraded efficiency comes from the thermal decomposition, which can not be observed from the outside but only by experiment. In this study, the comparison between the efficiency of normal modules and degradation modules is presented. Module having degraded cell was seen to cause increase of series resistance by about 80%, in comparison to normal samples efficiency which reduce by about 20%. This study shows that the effects of series resistances on module performance are critical. These effects must be understood and taken into consideration when analyzing performance degradation.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• Journal of the Architectural Institute of Korea Structure & Construction
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• v.35 no.8
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• pp.177-184
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• 2019

Recently, electric power usages and peak loads from buildings are increasing due to higher outdoor air temperatures and/or abnormal climate during the summer period. As one of the eco-friendly measures, a renewable energy system has been received much attention. Particularly, interest on a photovoltaic (PV) system using solar energy has been rapidly increasing in a building sector due to its broad applicability. In using the PV system, one of important factors is the PV efficiency. The normal PV efficiency is determined based on the STC(Standard Test Condition) and the NOCT(Nominal Operating Cell Temperature) performance test. However, the actual PV efficiency is affected by the temperature change at the module surface. Especially, higher module temperatures generally reduce the PV efficiency, and it leads to less power generation from the PV system. Therefore, the analysis of the relation between the module temperature and PV efficiency is required to evaluate the PV performance during the summer period. This study investigates existing algorithms for calculating module surface temperatures and analyzes resultant errors with the algorithms by comparing the measured module temperatures.

• Solar Energy
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• v.17 no.4
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• pp.3-11
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• 1997

Because grain boundaries in polycrystalline silicon act as potential barriers and recombination centers for the photo-generated charge carriers, these defects degrade conversion effiency of solar cell. To reduce these effects of grain boundaries, we investigated various influencing factors such as thermal treatment, various grid pattern, selective wet etching for grain boundaries, buried contact metallization along grain boundaries, grid on metallic thin film. Pretreatment above $900^{\circ}C$ in $N_2$ atmosphere, gettering by $POCl_3$ and Al treatment for back surface field contributed to obtain a high quality poly-Si. To prevent carrier losses at the grain boundaries, we carried out surface treatment using Schimmel etchant. This etchant delineated grain boundaries of $10{\mu}m$ depth as well as surface texturing effect. A metal AI diffusion into grain boundaries on rear side reduced back surface recombination effects at grain boundaries. A combination of fine grid with finger spacing of 0.4mm and buried electrode along grain boundaries improved short circuit current density of solar cell. A ultra-thin Chromium layer of 20nm with transmittance of 80% reduced series resistance. This paper focused on the grain boundary effect for terrestrial applications of solar cells with low cost, large area, and high efficiency.