• Title/Summary/Keyword: Parallel-Hybrid

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CMOS-Memristor Hybrid 4-bit Multiplier Circuit for Energy-Efficient Computing

  • Vo, Huan Minh;Truong, Son Ngoc;Shin, Sanghak;Min, Kyeong-Sik
    • Journal of IKEEE
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    • v.18 no.2
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    • pp.228-233
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    • 2014
  • In this paper, we propose a CMOS-memristor hybrid circuit that can perform 4-bit multiplication for future energy-efficient computing in nano-scale digital systems. The proposed CMOS-memristor hybrid circuit is based on the parallel architecture with AND and OR planes. This parallel architecture can be very useful in improving the power-delay product of the proposed circuit compared to the conventional CMOS array multiplier. Particularly, from the SPECTRE simulation of the proposed hybrid circuit with 0.13-mm CMOS devices and memristors, this proposed multiplier is estimated to have better power-delay product by 48% compared to the conventional CMOS array multiplier. In addition to this improvement in energy efficiency, this 4-bit multiplier circuit can occupy smaller area than the conventional array multiplier, because each cross-point memristor can be made only as small as $4F^2$.

A Study on Optimization of Components Sizing for 4×4 Series Hybrid Electric Propulsion Systems (4륜구동 직렬형 하이브리드 전기추진시스템의 구성품 용량 최적화 연구)

  • Jang, Myeong-Eon;Jeong, Soon-Kyu;Han, Kyu-Hong;Yeo, Seung-Tai
    • Journal of the Korea Institute of Military Science and Technology
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    • v.17 no.2
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    • pp.159-166
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    • 2014
  • The study is conducted on the subject of optimization of components sizing for series hybrid electric propulsion systems. The components sizing of series type hybrid system is very important because each component of series type is larger than the corresponding component of the parallel type or series-parallel type. If the components sizing is greater or less than what is required to this system, the performance of the system is getting worse. The methodology for the sizing of a driving motor is introduced based on the foundation of determined system configuration and performance target. And the sizing of an engine/generator and a battery is achieved based on simulation results using Dynamic Programming. It is possible to find the optimal sizing of these components by comparing fuel efficiency of hybrid electric propulsion system for 8 driving cycles.

A Hybrid Metaheuristic for the Series-parallel Redundancy Allocation Problem in Electronic Systems of the Ship

  • Son, Joo-Young;Kim, Jae-Hwan
    • Journal of Advanced Marine Engineering and Technology
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    • v.35 no.3
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    • pp.341-347
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    • 2011
  • The redundancy allocation problem (RAP) is a famous NP.complete problem that has beenstudied in the system reliability area of ships and airplanes. Recently meta-heuristic techniques have been applied in this topic, for example, genetic algorithms, simulated annealing and tabu search. In particular, tabu search (TS) has emerged as an efficient algorithmic approach for the series-parallel RAP. However, the quality of solutions found by TS depends on the initial solution. As a robust and efficient methodology for the series-parallel RAP, the hybrid metaheuristic (TSA) that is a interactive procedure between the TS and SA (simulated annealing) is developed in this paper. In the proposed algorithm, SA is used to find the diversified promising solutions so that TS can re-intensify search for the solutions obtained by the SA. We test the proposed TSA by the existing problems and compare it with the SA and TS algorithm. Computational results show that the TSA algorithm finds the global optimal solutions for all cases and outperforms the existing TS and SA in cases of 42 and 56 subsystems.

An Optimal Reliability-Redundancy Allocation Problem by using Hybrid Parallel Genetic Algorithm (하이브리드 병렬 유전자 알고리즘을 이용한 최적 신뢰도-중복 할당 문제)

  • Kim, Ki-Tae;Jeon, Geon-Wook
    • IE interfaces
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    • v.23 no.2
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    • pp.147-155
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    • 2010
  • Reliability allocation is defined as a problem of determination of the reliability for subsystems and components to achieve target system reliability. The determination of both optimal component reliability and the number of component redundancy allowing mixed components to maximize the system reliability under resource constraints is called reliability-redundancy allocation problem(RAP). The main objective of this study is to suggest a mathematical programming model and a hybrid parallel genetic algorithm(HPGA) for reliability-redundancy allocation problem that decides both optimal component reliability and the number of component redundancy to maximize the system reliability under cost and weight constraints. The global optimal solutions of each example are obtained by using CPLEX 11.1. The component structure, reliability, cost, and weight were computed by using HPGA and compared the results of existing metaheuristic such as Genetic Algoritm(GA), Tabu Search(TS), Ant Colony Optimization(ACO), Immune Algorithm(IA) and also evaluated performance of HPGA. The result of suggested algorithm gives the same or better solutions when compared with existing algorithms, because the suggested algorithm could paratactically evolved by operating several sub-populations and improve solution through swap, 2-opt, and interchange processes. In order to calculate the improvement of reliability for existing studies and suggested algorithm, a maximum possible improvement(MPI) was applied in this study.

A Parallel Hybrid Soft Switching Converter with Low Circulating Current Losses and a Low Current Ripple

  • Lin, Bor-Ren;Chen, Jia-Sheng
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1429-1437
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    • 2015
  • A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

Simulation and Experimental Validation of Gain-Control Parallel Hybrid Fiber Amplifier

  • Ali, Mudhafar Hussein;Abdullah, Fairuz;Jamaludin, Md. Zaini;Al-Mansoori, Mohammed Hayder;Al-Mashhadani, Thamer Fahad;Abass, Abdulla Khudiar
    • Journal of the Optical Society of Korea
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    • v.18 no.6
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    • pp.657-662
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    • 2014
  • We demonstrate a simulation of a parallel hybrid fiber amplifier in the C+L-band with a gain controlling technique. A variable optical coupler is used to control the input signal power for both EDFA and RFA branches. The gain spectra of the C+L-band are flattened by optimizing the coupling ratio of the input signal power. In order to enhance the pump conversion efficiency, the EDFA branch was pumped by the residual Raman pump power. A gain bandwidth of 60 nm from 1530 nm to 1590 nm is obtained with large input signal power less than -5 dBm. The gain variation is about 1.06 dB at a small input signal power of -30 dBm, and it is reduced to 0.77 dB at the large input signal power of -5 dBm. The experimental results show close agreement with the simulation results.

Design of a Rule-Based Solution Based on MFC for Inspection of the Hybrid Electronic Circuit Board (MFC 기반 하이브리드 전자보오드 검사를 위한 규칙기반 솔루션 설계)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.9
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    • pp.531-538
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    • 2005
  • This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

Parallel Hybrid Genetic Algorithm-Tabu Search for Distribution System Reconfiguration Using PC Cluster System (배전계통 재구성 문제에 PC클러스터 시스템을 이용한 병렬 유전 알고리즘-타부탐색법 구현)

  • Mun K. J.;Kim H. S.;Park J. H.;Lee H. S.;Kang H. T.
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.36-38
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    • 2004
  • This paper presents an application of parallel hybrid Genetic Algorithm-Tabu Search (GA-TS) algorithm to search an optimal solution of a recokiguration in distribution system. In parallel hybrid CA-TS, after CA operations, stings which are not emerged in the past population are selected in the reproduction procedure. After reproduction operation, if there are many strings which are in the past population, we add new random strings into the population, if there's no improvement for the predetermined iteration, local search procedure is executed by TS for the strings with high fitness function value. To show the usefulness of the proposed method, developed algorithm has been tested and compared on a distribution system in the reference paper.

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Parallel Hybrid Genetic Algorithm-Tabu Search for Distribution System Service Restoration Using PC Cluster System (배전계통 고장복구 문제에 PC 클러스터 시스템을 이용한 병렬 유전 알고리즘-타부탐색법 구현)

  • Mun K. J.;Kim H. S.;Park J. H.;Lee H. S.;Kang H. T.
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.446-448
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    • 2004
  • This paper presents an application of parallel hybrid Genetic Algorithm-Tabu Search (GA-TS) algorithm to search an optimal solution of a service restoration in distribution system. In parallel hybrid GA-TS, after GA operations, strings which are not emerged in the past population are selected in the reproduction procedure. After reproduction operation, if there are many strings which are in the past population, we add new random strings into the population. If there's no improvement for the predetermined iteration, local search procedure is executed by f for the strings with high fitness function value. To show the usefulness of the proposed method, developed algorithm has been tested and compared on a practical distribution system in Korea.

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A Study on The Hybrid Acquisition Performance of MC DS-CDMA Over Multipath Fading Channel (다중경로 환경에서 MC DS-CDMA시스템의 직.병렬 혼합 동기 획득에 관한 연구)

  • Kim, Won-Sbu;Kim, Kyung-Won;Park, Jin-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.10
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    • pp.1968-1976
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    • 2007
  • This paper proposes a hybrid pseudo-noise (PN) code acquisition scheme for Multicarrier Direct Sequence - Code Division Multiple Access (MC DS-CDMA) mobile communication systems on the code acquisition performance for Nakagami-m fading channel. The hybrid acquisition scheme combines parallel search with serial search to cover the whole uncertainty region of the input code phase. It has a much simpler acquisition hardware structure than the total parallel acquisition and can achieve the mean acquisition time (MAT) slightly inferior to that of the total parallel acquisition. The closed-form expressions of the detection and false-alarm probabilities are derived.