• 전력전자학회논문지
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• 제8권6호
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• pp.585-592
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• 2003

The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between Inverters on synchronous d-q reference frame.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(3)
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• pp.29-32
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• 2001

In this paper, we applied the high-performance PGAP(Parallel Genetic Algorithm Processor) to recognizing rotated pattern. In order to perform this research efficiently, we used Multi-PGAP system consisted of four PGAP. In addition, we used mental rotation based on the rotated pattern recognition mechanism of human to reduce the number of operation. Also, we experimented with distinguishing specific pattern from similar coin patterns and determine rotated angle between patterns. The result showed that the development of future artificial recognition system is feasible by employing high performance PGAPS.

• 한국정보처리학회논문지
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• 제6권5호
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• pp.1219-1224
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• 1999

This paper derived Montgomery's parallel algorithms for modular multiplication based on Walter's and Iwamura's method, and compared data dependence graph of each parallel algorithm. Comparing the result, Walter's parallel algorithm has small computational index in data dependence graph, so it is selected and used to computed spatial and temporal pipelining diagrams with each projection direction for designing expansible bit-level systolic array. We also evaluated internal operation of proposed expansible systolic array C++ language.

• 한국컴퓨터정보학회논문지
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• 제17권1호
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• pp.171-181
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• 2012

본 논문은 대칭키 기반의 암호 알고리즘으로 사용하는 AES 암호 알고리즘을 정의하고, 멀티코어 프로세서의 자원을 최대 활용하기 위한 병렬 암호 알고리즘 설계를 제안한다. 제안한 병렬 암호 알고리즘은 코어의 개수에 따라 암호 알고리즘을 쓰레드별로 할당하여 암호 연산의 병렬 수행을 확인하였고, AES 암호 알고리즘에 비해 약 30% 성능향상을 확인하였다. 암호 알고리즘의 암 복호화 성능은 바이너리 비교 분석 툴을 통해 확인하여, AES 암호 알고리즘과 제안한 병렬 암호 알고리즘의 바이너리는 동일 결과를 확인하였으며, 복호화한 바이너리 또한 동일하였다. 본 논문에서 제안한 멀티코어 프로세서 환경의 병렬 암호 알고리즘은 개인 PC, 노트북, 서버, 모바일 환경에서 금융 서비스의 인증 및 결제에 적용 가능하고, 대형 데이터의 고속 암호화 연산이 필요한 분야에서 활용 가능하다.

• 전기학회논문지
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• 제65권10호
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• pp.1672-1681
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• 2016

This paper proposes a wireless parallel operation method of three-phase modular UPS inverter using resistive droop control. Furthermore, it applies a virtual resistor to droop control so that the output impedance of UPS inverter gets closer to resistive. It makes resistive droop control effective. The simulation using PSIM was performed in order to verify the validity of proposed algorithm. After consisting two-parallel system with three-phase modular UPS inverter, the experiment according to resistive load was conducted. It demonstrated the performance of current sharing and power sharing.

• 한국정보과학회논문지:시스템및이론
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• 제26권10호
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• pp.1185-1193
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• 1999

최적 스택 필터는 시그널 또는 영상의 임의의 특성 정보를 보존하고자 하는 요구조건에 의해 강제된 구조적 제약 하에서 최대의 잡음제거 효과를 얻을 수 있다. 그리고 임계치 분할 특성과 양의 부울 함수에 기반한 이진 영역에서의 처리 특성은 이 필터가 높은 병렬성을 갖고 있음을 보여준다. 본 논문에서는 두 개의 병렬 계산 모델 MCC(Mesh-Connected Computer)와 CCC(Cube-Connected Computer)에서 최적 스택 필터를 위한 1차원 병렬 알고리즘을 개발한다. 최적 스택 필터의 실행 시간은 주로 이진 median 연산에 의해 결정되고 본 논문에서 제안된 알고리즘은 선형 분리성에 의해 이 연산을 구현한다. 이를 바탕으로, M 레벨의 1-D 시그널의 길이가 L이고 윈도우 폭이 N이라고 가정할 때, 제안된 알고리즘은 {{{{root M times root M`` MCC에서 O(L sqrt{M}`) 시간에 그리고 M 개의 PE를 갖는 CCC에서 O(L log M)시간에 수행될 수 있다. 또한 잡음을 더욱 효과적으로 제거하기 위해 윈도우 폭 N을 증가시킬 때, 제안된 병렬 알고리즘의 계산 시간은 일정하게 유지됨을 보인다.Abstract An optimal stack filter achieves the maximum noise attenuation under the structural constraints imposed by the requirement of preserving certain signal or image features. And the filter provides a high parallelism due to the principles of threshold decomposition and binary processing based on positive Boolean functions(PBFs). In this paper, we develop an one-dimensional parallel algorithm for the optimal stack filter on two parallel computation models, MCC(Mesh-Connected Computer) and CCC(Cube-Connected Computer). The running time of the optimal stack filter depends mainly on the binary median operation and our algorithm realizes this operation by the linear separability. Based on this scheme, our parallel algorithm can be performed in {{{{O(L sqrt{M}`) MCC and inO(L log M) time on CCC with M PEs, when the length of M``-valued 1-D signal is L`` and window width is N`` Also, we show that the computation time of our parallel algorithm keeps constant when the window width N increases in order to achieve the best noise attenuation.

• 전력전자학회논문지
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• 제22권1호
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• pp.44-52
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• 2017

This paper describes a 100 kW high-efficiency isolated DC-DC converter for DC distribution system. The DC-DC converter consists of two dual-active-bridge (DAB) converters in parallel. The operating principle of the DAB converter is explained, and the algorithm for parallel operation of the DAB converters is proposed. Simulation and experiments are conducted to verify the performance of the proposed system. Experimental results demonstrate that the developed converter excellently marks 97.4 percent of peak efficiency under its normal operating condition.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 A
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• pp.234-235
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• 2006

The protection relay keeps electric power facilities by using signals of the voltage and current which are input and output terminals of each equipment. Each relay performances protection algorithm by using informations of own protecting zone. To prevent the mal-operation in inrush current, established transformer differential protection method uses the second harmonics as blocking signal. This method is not operate at the initial inrush. However, in case of the parallel operation, if the initial inrush is occurred in one transformer which is generated, the sympathetic inrush Is occurred in adjacent transformer. This paper approach the sympathetic inrush detecting algorithm of a transformer based on agent. Proposed algorithm, when inrush current occurred, distinguish sympathetic inrush or not by using differential current of adjacent transformer. This algorithm have the advantage of the distinguishing initial inrush and sympathetic inrush at operation of parallel transformer

• 한국컴퓨터정보학회논문지
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• 제20권7호
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• pp.9-16
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• 2015

This paper proposes the parallel design of a shot change detection algorithm using frame segmentation and moving blocks. In the proposed approach, the high parallel processing components, such as frame histogram calculation, block histogram calculation, Otsu threshold setting function, frame moving operation, and block histogram comparison, are designed in parallel for NVIDIA GPU. In order to minimize memory access delay time and guarantee fast computation, the output of a GPU kernel becomes the input data of another kernel in a pipeline way using the shared memory of GPU. In addition, the optimal sizes of CUDA processing blocks and threads are estimated through the prior experiments. In the experimental test of the proposed shot change detection algorithm, the detection rate of the GPU based parallel algorithm is the same as that of the CPU based algorithm, but the average of processing time speeds up about 6~8 times.

• 한국멀티미디어학회논문지
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• 제20권5호
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• pp.740-747
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• 2017

A fast cell contour extraction method using CUDA parallel processing technique is presented. The cell contour extraction is one of important processes to analyze cell information in pathology. However, conventional sequential contour extraction methods are slow for a huge high-resolution medical image, so they are not adequate to use in the field. We developed a parallel morphology operation algorithm to extract cell contour more quickly. The algorithm can create an inner contour and fail to extract the contour from the concave part of the cell. We solved these problems by subdividing the contour extraction process into four steps: morphology operation, labeling, positioning and contour extraction. Experimental results show that the proposed method is four times faster than the conventional one.