• KIPS Transactions on Computer and Communication Systems
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• v.6 no.10
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• pp.407-414
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• 2017

Pig monitoring applications consisting of many tasks can take advantage of inherent data parallelism and enable parallel processing using performance accelerators. In this paper, we propose a task distribution method for pig monitoring applications into a heterogenous computing platform consisting of a multicore-CPU and a manycore-GPU. That is, a parallel program written in OpenCL is developed, and then the most suitable processor is determined based on the measured execution time of each task. The proposed method is simple but very effective, and can be applied to parallelize other applications consisting of many tasks on a heterogeneous computing platform consisting of a CPU and a GPU. Experimental results show that the performance of the proposed task distribution method on three different heterogeneous computing platforms can improve the performance of the typical GPU-only method where every tasks are executed on a deviceGPU by a factor of 1.5, 8.7 and 2.7, respectively.

• Journal of the Institute of Convergence Signal Processing
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• v.16 no.3
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• pp.83-89
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• 2015

Connected component labeling (CCL) is a mandatory step in image segmentation where objects are extracted and uniquely labeled. CCL is a computationally expensive operation and thus is often done in parallel processing framework to reduce execution time. Various parallel CCL methods have been proposed in the literature. Among them are NSZ label equivalence (NSZ-LE) method, modified 8 directional label selection (M8DLS) method, HYBRID1 method, and HYBRID2 method. Soh et al. showed that HYBRID2 outperforms the others and is the best so far. In this paper we propose a new hybrid parallel CCL algorithm termed as HYBRID3 that combines selective four directional label search (S4DLS) with label backtracking (LB). We show that the average percentage speedup of the proposed over M8DLS is around 60% more than that of HYBRID2 over M8DLS for various kinds of images.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.4
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• pp.369-378
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• 1992

This paper proposes a utility parallel processing inverter system, which consists of a voltage source PWM inverter, isolation transformer and a reactor linking the inverter to utility line. This system realizes following functions : (1) voltage phase frequency and amplitude synchronization between inverter and utility line at stand-alone mode. (2) current phase synchronization between inverter and load at parallel mode. Therefore, despite sudden increase in load current over setting point at stand-alone mode, inverter system can be transferred into parallel mode immediately without transient current. Furthermore, high frequency(18KHz) PWM control and sinusoidal filtering improve the inverter output waveform by eliminating high order harmonic components as well as low order. As a switching device, IGBT is used for high frequency switching and large current capacity.

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1512-1517
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• 2003

This paper presents the calibration for the parallel typed tilting table. The calibration system needs only simple sensing device which is a digital indicator to measure the orientation of a table. The calibration algorithm is developed by a measurement operator. It eliminates the concern about the poor parameter observability due to a large number of parameters of parallel-mechanism. This paper uses the QR-decomposition to find the optimal calibration configurations maximizing the linear independence of rows of a observation matrix. The number of identifiable parameters is examined by the rank of the observation matrix, which represents the parameter observability. The method is applied to a Parallel-typed Tilting Table and all the necessary kinematic parameters are identifiable.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.1003-1006
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• 2002

In machining free-form curves with a machine tool equipped with parallel device, improving contouring accuracy is very important. In this paper, we present contouring control algorithm far parallel machine tool. The relation between the error in Joint space and the error in catesian space is evaluated, and we estimate contouring error vector which efficiently determines the variable gains for the cross coupled control. To show the validity of the algorithm, the contouring control is simulated for free form contour trajectory in cubic parallel machine tool model.

• Progress in Superconductivity and Cryogenics
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• v.10 no.1
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• pp.32-36
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• 2008

An HTS conductor with parallel HTS tapes is essential for a large power HTS device to flow a large current. One of the most important factor for this conductor is a current distribution. Non-uniform current distribution in parallel tapes makes the critical current of the conductor low and the AC losses high. In this paper we proposed a non-contact method which measured each current in parallel tapes by using an array of Hall sensors. A matrix can be derived from this array for calibration. The current distributions of 4 and 6 parallel tapes were measured.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.825-830
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• 2004

Kinematic calibration of Gough-Stewart platform using a new measurement device is presented in this paper. The device simultaneously measures components of position and orientation using commercially available gadgets. Additional kinematic parameters are defined to model the sources of inaccuracies for the proposed measurement device. Computer simulations reveal that all kinematic parameters of the Gough-Stewart platform and the additional kinematic parameters of the measurement device can be identified with the partial pose measurements of the device. Results also show that identification is robust for the initial errors and the noise in measurements. The device also facilitates the automation of easurement procedure.

• Journal of the Korean Society for Precision Engineering
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• v.26 no.8
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• pp.79-88
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• 2009

This paper presents the analytical stiffness analysis method for a low-DOF planar parallel manipulator. An n-DOF (n<3) planar parallel manipulator to which 1- or 2-DOF serial mechanism is connected in series may be used as a positioning device in planar tasks requring high payload and high speed. Differently from a 3-DOF planar parallel manipulator, an n-DOF planar parallel counterpart may be subject to constraint forces as well as actuation forces. Using the theory of reciprocal screws, the planar stiffness is modeled such that the moving platform is supported by three springs related to the reciprocal screws of actuations (n) and constraints (3-n). Then, the spring constants can be precisely determined by modeling the compliances of joints and links in serial chains. Finally, the stiffness of two kinds of 2-DOF planar parallel manipulators with simple and complex springs is analyzed. In order to show the effectiveness of the suggested method, the results of analytical stiffness analysis are compared to those of numerical stiffness analysis by using ADAMS.

• Proceedings of the KIEE Conference
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• summer
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• pp.806-808
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• 2004

The series and parallel connection is essential for increasing power ratings of resistive type for fault current limiters. To increase voltage class, components are connected in series and to increase current level to the nominal value, they are connected in parallel. There are two ways to connect components in series and parallel. First, connected in series and then the module connects to the parallel. Second, connected in parallel and the module connects to the series. We have studied for the two ways. In this paper, we particularly investigated way to connect components in parallel first This way has the advantage of inducing effective simultaneous quench without any other devices, for example, the thing which is inducing magnetic field to the limiting and shunt resistors. And also we studied for the endurance of component which is patterned to the bi-spiral for prospective fault current. It is very important to understand this, because SFCL will use as the only device to decrease burden of circuit breaker. As experimental results, limiting component patterned to bi-spiral endures fault current up to 30kA and it works well, in parallel to series connection,

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.7
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• pp.775-787
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• 2010

Unlike general-purpose CPUs, the GPUs have been specialized as many-core streaming processors, and are frequently replacing the CPUs in an increasing range of computations thanks to their outstanding parallel computing capacity. In order to respond to such trend, NVIDIA has recently issued a new parallel computing architecture called CUDA(Compute Unified Device Architecture), offering a flexible GPU programming environment for GPGPU(General Purpose GPU) computing. In general, when programmers use the CUDA API, they should clearly understand many aspects of GPU's computing architecture to produce efficient parallel software. In this article, we explain several optimization techniques for CUDA programming that we have verified through a lot of experiment and trial and error, and review how those techniques affect the performance of code execution. In particular, we use a specific problem as an example to analyze several elements that affect performances, such as effective accesses to hierarchical memory system, processor occupancy, and latency hiding. In conclusion, we present several directions that may be utilized effectively in CUDA-based parallel programming.