• Journal of Communications and Networks
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• 제1권3호
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• pp.145-152
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• 1999

A new switch architecture is presented to enhance out-put queuing in photonic packet switches. Its appkication is for a packet switching enviroment based on the optical transport of fixed length packets. This architecture consists of a couple of cas-cading switching elements with output queuing, whose buffer ca-pacity is limited by photonic technology. The introduction of a suitable buffer management allows a very good and balanced ex-ploitation of the available optical memories, realized with fiber de-lay lines. In particular, packet loss performance is here evaluated showing the improvement with respect to the single switch and a way to design large optical switches is shown in order to meet broadband network requirements.

• Journal of information and communication convergence engineering
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• 제9권5호
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• pp.551-555
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• 2011

Optical packet switching is a promising technology, which can integrate both data and optical network. In this paper, we present a comparative study of various traffic arrival approaches in WDM packet switches. The comparison is made based on packet loss rate and average delay under uniform and self-similar Pareto traffic. Computer simulations are performed in order to obtain the switch performance metrics. Study shows that burstiness of data traffic has a strong negative impact in the performance of WDM packet switches.

• Journal of Communications and Networks
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• 제9권3호
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• pp.330-341
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• 2007

This work analyzes the performance of the parallel packet switch (PPS) with a sliding window (SW) method. The PPS involves numerous packet switches that operate independently and in parallel. The conventional PPS dispatch algorithm adopts a round robin (RR) method. The class of PPS is characterized by deployment of parallel low-speed switches whose all memory buffers run more slowly than the external line rate. In this work, a novel SW packet switching method for PPS, called SW-PPS, is proposed. The SW-PPS employs memory space more effectively than the existing PPS using RR algorithm. Under identical Bernoulli and bursty data traffic, the SW-PPS provided significantly improved performance when compared to PPS with RR method. Moreover, this investigation presents a novel mathematical analytical model to evaluate the performance of the PPS using RR and SW method. Under various operating conditions, our proposed model and analysis successfully exhibit these performance characteristics including throughput, cell delay, and cell drop rate.

• ETRI Journal
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• 제27권4호
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• pp.469-472
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• 2005

To enhance the scalability of high performance packet switches, a two-stage load-balanced switch has recently been introduced, in which each stage uses a deterministic sequence of configurations. The switch is simple to make scalable and has been proven to provide 100% throughput. However, the load-balanced switch may mis-sequence the packets. In this paper, we propose an algorithm called full frame stuff (FFS), which maintains packet order in the two-stage load-balanced switch and has excellent switching performance. This algorithm is distributed and each port can operate independently.

• 융합신호처리학회논문지
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• 제7권3호
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• pp.136-142
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• 2006

공유 메모리 관리를 위한 기존의 방법들은 가상 큐 길이의 정적 제한을 통해 일정 크기의 버퍼 할당을 보장하려는 방식과 전체 버퍼 공간의 할당 측면에서 공유 버퍼의 이용률을 높이고자 하는 방식 등으로 나눌 수 있다. 완전공유 방식의 경우 낮은 트래픽 부하에서 높은 메모리 공유 효과를 보이나 트래픽 부하가 높아지면 특정 가상큐가 공유 메모리를 과다하게 점유하는 것을 방지하는 의미에서의 보호 효과를 거의 기대하기 힘들다. 반대로 정적 임계치 방식의 경우 트래픽 조건 변화에 따른 적절한 임계치 설정이 불가능하다. 본 논문에서는 공유 메모리의 공정 할당이라는 단순한 기능을 가지는 동적 임계치 방식을 확장하여 구현이 용이하고 높은 메모리 이용률과 서비스 품질기능 측면에서 우선 순위에 따른 차등 적인 패킷처리 기능을 갖는 가중형 동적 임계치 방식을 제안하고 컴퓨터 시뮬레이션을 통하여 그 성능을 확인하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제6권3호
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• pp.855-868
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• 2012

In this paper, we consider the discrete memoryless user relaying channel (DMURC) in which a user-relay switches its operational mode symbol-by-symbol. In particular, we obtain upper and lower bounds on the channel capacity for the general DMURC and then show that these the upper and lower bounds coincide for degraded DMURC. It is also shown that the capacity of the degraded DMURC can be achieved using two separate codebooks corresponding to the two UR states. While the UR is assumed to switch states symbol-by-symbol, the results in this paper is the same as when the UR switches states packet-by-packet.

• 한국통신학회논문지
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• 제28권1B호
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• pp.80-86
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• 2003

주문형 비디오 시스템과 같은 고속 네트워킹 응용들은 매우 높은 멀티캐스트 부하를 지원할 수 있는 스위치를 필요로 한다 과거에 연구된 스위치들은 멀티캐스트되는 패킷의 비율이 25${\sim}$30% 정도에서 성능이 유지되었다 이러한 한계를 극복하기 위하여 85${\sim}$90% 정도의 높은 멀티캐스트 부하에서도 성능이 저하되지 않는 TEDN 멀티캐스트 스위치가 제안되었다 그러나 TEDN 멀티캐스트 스위치의 일련의 라우팅 망에는 사용되지 않는 라우팅 용량이 매우 많이 존재한다. 본 논문에서는 과도한 라우팅 용량을 절약하기 위하여 개선된 TEDN 멀티캐스트 스위치를 제안한다. 마지막 라우팅 망에서 패킷을 재순환시킴으로써, 기존의 스위치보다 더 적은 라우팅 망을 사용하여 허용 가능한 패킷 손실률을 얻을 수 있다. 시뮬레이션 결과를 통해서 제안된 스위치들이 더 적은 하드웨어 비용으로 허용 가능한 패킷 손실률을 얻을 수 있음을 보인다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제13권2호
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• pp.733-750
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• 2019

Software Defined Networking (SDN) is a new network paradigm, allowing administrators to manage networks through central controllers by separating control plane from data plane. So, one or more controllers must locate outside switches. However, this separation may cause delay problems between controllers and switches. In this paper, we therefore propose a Priority-based Scheduling policy for OpenFlow (PSO) to reduce the delay of some significant traffic. Our PSO is based on packet prioritization mechanisms in both OpenFlow switches and controllers. In addition, we have prototyped and experimented on PSO using a network simulator (ns-3). From the experimental results, PSO has demonstrated low delay for targeted traffic in the out-of-brand control network. The targeted traffic can acquire forwarding rules with lower delay under network congestion in control links (with normalized load > 0.8), comparing to traditional OpenFlow. Furthermore, PSO is helpful in the in-band control network to prioritize OpenFlow messages over data packets.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 춘계학술대회 논문집
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• pp.332-338
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• 2008

This paper handles, implementation of multiple access bidirectional serial communications protocol using two common DC power lines, whict are power supply and ground, connecting multiple devices. Communication between the host and the multiple clients are performed using unique packet data with device ID unique to each devices connected on the common power lines. Host initiates data communications by transmitting command packet to the designated client with the client's ID and the client responds by transmitting response packet to the host and in this way, multiple clients and host exchange the packet through the common power lines. The normal voltage of the power communication line maintains 24V corresponding to level 1 and the host drops the voltage to 12V on sending level 0 signal, also the clients normally keeps the line voltage to 24V use pull-down circuit to drop the voltage to 12V on sending level 1 signal. Power supply originates from the host, the host senses the voltage level of the power communication lines and when the clients activates pull down circuit to send level 0 signal and the voltage drops to 12V, the hosts switches power source from 24V to 12V. Also, when clients deactivate pull down circuit to send level 1 signal, the host senses the voltage increase and switches the power source from 12V to 24V. Experimental circuit is designed with one hosts and four clients and verified the power line voltage switching operation depending on the data signal levels on the power line. The proposed research result can be applied to two wire power communications system with one host and multiple low current consumption clients.

• 한국통신학회논문지
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• 제27권10C호
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• pp.937-944
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• 2002

인터넷 트래픽의 급속한 증가로 인해 보다 큰 네크워크 용량이 요구되고 있다. 광 패킷 교환은 상이한 유형의 데이터를 지원하는 미래의 네트워크에서 필요한 특성들인 고속의 데이터 교환, 데이터 속도와 유형에 대한 투명성 등을 제공하여 준다. 본 논문에서는 IP 전송을 위해 광 패킷 코어 스위치와 광섬유링크로 구성된 광 백본 네트워크를 정의한다. 그리고 WDM 광 네트워크에서 광섬유 상에 존재하는 다수의 파장링크의 전 대역을 통합하여 단일매체의 대역으로 관리하는 멀티링크 광 패킷 스위치를 제안한다. 제안된 스위치는 WDM 버퍼를 사용할 뿐만 아니라 출력 링크의 광 패킷 메모리를 균등하게 사용하여, 필요한 메모리의 수를 줄임으로써 광 패킷 메모리를 경제적으로 실현할 수 있다. 컴퓨터 시뮬레이션에 의한 성능평가의 결과는 제안 스위치의 휴효성을 보여준다.