• Title/Summary/Keyword: Packet Analysis

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Stability Analysis of Networked Control Systems with Packet Dropouts (패킷 손실을 고려한 네트워크 제어 시스템의 안정성 분석)

  • Kim, Jae-Man;Park, Jin-Bae;Choi, Yoon-Ho
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1731_1732
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    • 2009
  • This paper presents a stability analysis of networked control systems with packet dropouts. The packet dropouts are modeled as a linear function of the stochastic variable satisfying Bernoulli random binary distribution and weighted moving average (WMA). The observer based controller scheme is designed to exponentially mean square stabilize the NCS. Simulation results is provided to show the applicability of the proposed method.

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Analysis of traffic capacity of the packet handler subsystem (PHS) (패킷 핸들러의 트래픽 용량 분석에 대한 연구)

  • 홍정식;이해상;홍정완;이창훈;전경표
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 1990.04a
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    • pp.289-298
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    • 1990
  • A conceptual model of tentative packet handler subsystem (PHS) of TDX-10 is presented. This model is used to analyze the capacity of PHS especially when packet bus (PBUS) is bottleneck. In the viewpoint of performance analysis, cyclic server system and token bus LAN are utilized in modeling PHS.

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Modelling and Performance Evaluation of Packet Network by DEVS Simulation (DEVS 시뮬레이션을 이용한 패킷망의 모델링 및 성능분석)

  • 박상희
    • Journal of the Korea Society for Simulation
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    • v.3 no.1
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    • pp.75-88
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    • 1994
  • Discrete event modeling is finding ever more application to anlysis and design of complex manufacturing, communication, computer systems, etc. This paper shows how packet network systems may be advantageously represented as DEVS (Discrete Event System Specification) models by employing System Entity structure / Model base (SES/MB) framework developed by Zeigler. DEVS models and network structure representations support a strong basis for performance analysis of packet network systems. This approach is illustated in a typical packet network example with several routing strategies.

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Delay Analysis of the ISDN D-channel Access Protocol (ISDN D-채널 Access Protocol의 Delay 분석)

  • 이구연;은종관
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.2
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    • pp.98-111
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    • 1990
  • In this paper a queneing model for the D channel access protocal recommeded by CCITT is developed, and delays of the signalling and packet messages are analyzed using the model, Behaviors of packet and signalling messages in the D-channel access system are also investigated. The analytical results have been verified by simulation.

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Performance Analysis of a Packet Voice Multiplexer Using the Overload Control Strategy by Bit Dropping (Bit-dropping에 의한 Overload Control 방식을 채용한 Packet Voice Multiplexer의 성능 분석에 관한 연구)

  • 우준석;은종관
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.1
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    • pp.110-122
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    • 1993
  • When voice is transmitted through packet switching network, there needs a overload control, that is, a control for the congestion which lasts short periods and occurrs in local extents. In this thesis, we analyzed the performance of the statistical packet voice multiplexer using the overload control strategy by bit dropping. We assume that the voice is coded accordng to (4,2) embedded ADPCM and that the voice packet is generated and transmitted according to the procedures in the CCITT recomendation G. 764. For the performance analysis, we must model the superposed packet arrival process to the multiplexer as exactly as possible. It is well known that interarrival times of the packets are highly correlated and for this reason MMPP is more suited for the modelling in the viewpoint of accuracy. Hence the packet arrival process in modeled as MMPP and the matrix geometric method is used for the performance analysis. Performance analysis is similar to the MMPP IG II queueing system. But the overload control makes the service time distribution G dependent on system status or queue length in the multiplexer. Through the performance analysis we derived the probability generating function for the queue length and using this we derived the mean and standard deviation of the queue length and waiting time. The numerical results are verified through the simulation and the results show that the values embedded in the departure times and that in the arbitrary times are almost the same. Results also show bit dropping reduces the mean and the variation of the queue length and those of the waiting time.

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Delay analysis for a discretionary-priority packet-switching system

  • Hong, Sung-Jo;Takagi, Hideaki
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 1995.04a
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    • pp.729-738
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    • 1995
  • We consider a priority-based packet-switching system with three phases of the packet transmission time. Each packet belongs to one of several priority classes, and the packets of each class arrive at a switch in a Poison process. The switch transmits queued packets on a priority basis with three phases of preemption mechanism. Namely, the transmission time of each packet consists of a preemptive-repeat part for the header, a preemptive-resume part for the information field, and a nonpreemptive part for the trailer. By an exact analysis of the associated queueing model, we obtain the Laplace-Stieltjes transform of the distribution function for the delay, i.e., the time from arrival to transmission completion, of a packet for each class. We derive a set of equations that calculates the mean response time for each class recursively. Based on this result, we plot the numerical values of the mean response times for several parameter settings. The probability generating function and the mean for the number of packets of each class present in the system at an arbitrary time are also given.

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Performance Analysis of HomePNA 2.0 MAC Protocol (HomePNA 2.0 MAC 프로토콜의 성능 분석)

  • Kim, Jong-Won;Kim, Dae-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.10A
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    • pp.877-885
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    • 2005
  • The Home Phoneline Networking Alliance (HomePNA) 2.0 technology can establish a home network using existing in-home phone lines, which provides a channel rate of 4-32 Mbps. HomePNA 2.0 Medium Access Control(MAC) protocol adopts an IEEE 802.3 Carrier Sense Multiple Access with Collision Detection (CSMA/CD) access method, Quality of Service(QoS) algorithm, and Distributed Fair Priority Queuing(DFPQ) collision resolution algorithm. In this paper, we propose some mathematical models about the important elements of HomePNA 2.0 MAC protocol performance, which are Saturation Throughput, Packet Delay and Packet Jitter. Then, we present an overall performance analysis of HomePNA 2.0 MAC protocol along with simulations.

Statistical damage classification method based on wavelet packet analysis

  • Law, S.S.;Zhu, X.Q.;Tian, Y.J.;Li, X.Y.;Wu, S.Q.
    • Structural Engineering and Mechanics
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    • v.46 no.4
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    • pp.459-486
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    • 2013
  • A novel damage classification method based on wavelet packet transform and statistical analysis is developed in this study for structural health monitoring. The response signal of a structure under an impact load is normalized and then decomposed into wavelet packet components. Energies of these wavelet packet components are then calculated to obtain the energy distribution. Statistical similarity comparison based on an F-test is used to classify the structure from changes in the wavelet packet energy distribution. A statistical indicator is developed to describe the damage extent of the structure. This approach is applied to the test results from simply supported reinforced concrete beams in the laboratory. Cases with single and two damages are created from static loading, and accelerations of the structure from under impact loads are analyzed. Results show that the method can be used with no reference baseline measurement and model for the damage monitoring and assessment of the structure with alarms at a specified significance level.

Simulation Analysis for Verifying an Implementation Method of Higher-performed Packet Routing

  • Park, Jaewoo;Lim, Seong-Yong;Lee, Kyou-Ho
    • Proceedings of the Korea Society for Simulation Conference
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    • 2001.10a
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    • pp.440-443
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    • 2001
  • As inter-network traffics grows rapidly, the router systems as a network component becomes to be capable of not only wire-speed packet processing but also plentiful programmability for quality services. A network processor technology is widely used to achieve such capabilities in the high-end router. Although providing two such capabilities, the network processor can't support a deep packet processing at nominal wire-speed. Considering QoS may result in performance degradation of processing packet. In order to achieve foster processing, one chipset of network processor is occasionally not enough. Using more than one urges to consider a problem that is, for instance, an out-of-order delivery of packets. This problem can be serious in some applications such as voice over IP and video services, which assume that packets arrive in order. It is required to develop an effective packet processing mechanism leer using more than one network processors in parallel in one linecard unit of the router system. Simulation analysis is also needed for verifying the mechanism. We propose the packet processing mechanism consisting of more than two NPs in parallel. In this mechanism, we use a load-balancing algorithm that distributes the packet traffic load evenly and keeps the sequence, and then verify the algorithm with simulation analysis. As a simulation tool, we use DEVSim++, which is a DEVS formalism-based hierarchical discrete-event simulation environment developed by KAIST. In this paper, we are going to show not only applicability of the DEVS formalism to hardware modeling and simulation but also predictability of performance of the load balancer when implemented with FPGA.

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A Packet Scheduling Algorithm for High-speed Portable Internet System (휴대 인터넷 시스템에서의 패킷 스케줄링 알고리즘 연구)

  • Choi, Seong-Hoon
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.30 no.1
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    • pp.59-65
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    • 2007
  • HPI (High-speed Portable Internet) system which provides high speed internet services is going to be commercialized soon. Since HPI provides simultaneously four different service types such as UGS (Unsolicited Grant Service), rtPS (real time Polling Service), nrtPS(non-real time Polling Service), and BE (Best Effort) under different QoS (Quality of Service) requirements and limited wireless channel resources, efficient packet scheduling mechanisms are necessary to increase the utilization of channels as well as to satisfy the various QoS requirements. This study regards the traffic data to be served as time series and proposes a new packet scheduling algorithm based on the nonparametric statistical test. The performance of the newly proposed algorithm is evaluated through the simulation analysis using a simulator that can evaluate the performance of packet scheduling mechanisms under various values of system parameters and measures such as packet delay time, data transmission rate, number of loss packets, and channel utilization.