• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.4
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• pp.98-107
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• 2005

Brushless DC motor(BLDCM) can be driven by 120[^{\circ}]$ square wave voltage and use PWM pulse patterns in two-phase feeding scheme to control the speed of the motor. This Paper introduces four PWM modes used BLDCM control system, and analyzes their different influences on the motor performances using a time-stepped voltage source finite element method. To verify the proposed computational method, we built the prototype motor for electrical power steering(EPS) and compared the predicted and the measured back EMF and phase current.

• The Transactions of the Korean Institute of Power Electronics
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• v.3 no.1
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• pp.8-14
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• 1998

This paper describes a novel real-time based optimal Pulse Width Modulation (PWM) method suitable for microprocessor-based PWM inverters. Optimal switching patterns minimizing the performance index corresponding to the distortion between the reference and the controlled output voltages are decided by on-line calculation using the microprocessor-implemented control system. To show the effectiveness of the proposed PWM scheme, digital simulation studies and experiments using a 16-bit single-chip microcontroller (Intel 80C196KC) are performed. The results obtained from these simulation studies and experiments show that the proposed PWM scheme has better performance than the other methods such as the natural PWM and the direct PWM.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.11
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• pp.646-654
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• 1999

This paper deals with PWM patterns for harmonic reduction in inverter fed traction motors and the gear changing techniques for the variable speed drive of traction motor. GTOs are used as switching device of inverter because traction motor is a large load. To derive PWM rattern which can minimize the harmonics with the limited switching frequency, the output current and torque characteristic of SPWM and SHE PWM was analyzed. GTO inverter used for traction motor drive includes harmonics in the output current and torque by the limitation of switching frequency. However, the hybrid PWM method that adopt SPWM in the range of low frequency and SHE PWM in upper frequency range can achieve less harmonic characteristics in GTO inverters. If the traction motor is driven in variable speed by the proposed PWM pattern, 7 times of gear changing is needed. At the instant of the mode change, magnetic flux and torque may be altered and the large current flow. To reduce such an undesirable transient behavior, it is also presented the technique for the gear changing of inverter fed traction motor drive operated with the hybrid PWM. The results are verified by simulations and experiments.

• Journal of Power Electronics
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• v.8 no.4
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• pp.363-370
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• 2008

In this paper, three kinds of PWM strategies for a three-phase current-fed dc/dc converter are proposed and compared in terms of losses and voltage transfer ratio. Each PWM strategy is described graphically and their switching losses are analyzed. With the proposed PWM C strategy, one turn-off switching of each bridge switch is eliminated to reduce switching losses under the same switching frequency. In addition, RMS current through the bridge switches is lowered by using parallel connection between two bridge switches and thus, conduction losses of the switches are reduced. Further, copper losses of the transformer are decreased due to the reduced RMS current of each transformer's winding. Therefore, total losses are minimized and the efficiency of the converter is improved by using the proposed PWM C strategy. Digital signal processor (DSP: TI320LF2407) and a field-programmable gate array (FPGA: EPM7128) board are used to generate PWM patterns for three-phase bridge and clamp MOSFETs. A 500W prototype converter is built and its experimental results verify the validity of the proposed PWM strategies.

• IEIE Transactions on Smart Processing and Computing
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• v.2 no.4
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• pp.248-254
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• 2013

The size and power consumption of digital circuits including the dimming circuit part will increase for high-performance solid state lighting (SSL) systems in the future. This study examined the low-power consumption of adiabatic dynamic CMOS logic (ADCL) due to the principles of adiabatic charging. Furthermore, the designed low-power ADCL digital pulse width modulation (PWM) was optimized for SSL dimming systems. For this purpose, an ADCL digital 3-bit PWM was optimized in two steps. In the first step, the architecture of the ADCL digital 3-bit PWM was miniaturized. In the second step, the clock cut-off circuit was designed and added to the ADCL PWM. As a result, compared to the original configuration, 60 transistors and 15 capacitors of ADCL digital 3-bit PWM were reduced for miniaturization. Moreover, the clock cut-off circuit, which controls wake-up and sleep mode of ADCL D-FFs, was designed. The power consumption of an optimized ADCL digital PWM for all bit patterns decreased by 54 %.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.6
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.6
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• pp.217-225
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• 1986

This paper describes the Optimal PWM strategy to reduce a pulsating harmonic torque for a variable-speed drive of 3 phase induction motor. This paper suggests the new Optimal control theory which consists of 1) defining a performance index related to the unwanted effects of the voltage harmonics, (i.e., the components of pulsating harmonic torques) 2) achieving its minimization by a suitable choice of the switching patterns. (i.e., of the commutation angles) This PWM strategy is compared with the conventional SPWM strategy by numerical method. It is believed that this proposed strategy can reduce more harmonic components and pulsating harmonic torques than SPWM strategy. Also, We could verify the validety of the numerical method by a result of simulation analysis of a variable speed 3phase induction motor.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.6 no.1
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• pp.40-48
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• 1992

In this paper, th technique of particular harmonics elimination in three-phase PWM Inverter is discussed. And voltage control technique is derived whereby harmonics elimination is possible in variable voltage variable frequency three-phase I.M.. The required switching patterns are determined on Personal Computer and the results are stored in look-up table in EPROM for controlling the switching of the PWM Inverter. The results show that experiments are in good agreement with simulation based on the theory.

• Journal of Power Electronics
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• v.10 no.4
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• pp.374-381
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• 2010

Typical power electronic converters employ only pulse width modulation (PWM) to generate specific switching patterns. In this paper, a novel control strategy combining both pulse-width and amplitude modulation strategies (PWAM) has been proposed for power converters. The Pulse Amplitude Modulation (PAM), used in communication systems, has been applied to power electronic converters. This increases the degrees of freedom in eliminating or mitigating harmonics when compared to the conventional PWM strategies. The role of PAM in the novel PWAM strategy is based on the control of the converter's dc sources values. Software implementation of the conventional PWM and the PWAM control strategies has been applied to a five-level inverter for mitigating selective harmonics. Results show the superiority of the proposed strategy from the THD point of view along with a reduction in the inverter power dissipation.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.543-546
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• 1987

Trapezoidal wave is suitable for the modulating signal of the microcomputer based PWM inverter for the use of motor drives because the switching patterns can be generated by means of on-line computation. In this paper, the output waveform of three-level modulation inverters for the trapezoidal modulating signal is investigated both theoretically and experimentally.