• Journal of Power Electronics
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• v.15 no.2
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• Journal of Power Electronics
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• v.10 no.4
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• pp.342-350
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• 2010

Randomizing the switching frequency (RSF) to reduce the electromagnetic interference (EMI) of switching power converters is a well-known technique that has been previously discussed. The randomized pulse position (RPP) technique, in which the switching frequency is kept fixed while the pulse position (the delay from the starting of the switching cycle to the turn-on instant within the cycle) is randomized, has been previously addressed in the literature for the same purpose. This paper presents a double-hybrid technique (DHB) for EMI reduction in dc-dc switching regulators. The proposed technique employed both the RSF and the RPP techniques. To effectively spread the conducted-noise frequency spectrum and at the same time attain a satisfactory output voltage quality, two parameters (switching frequency and pulse position) were randomized, and a third parameter (the duty ratio) was controlled by a digital compensator. Implementation was achieved using field programmable gate array (FPGA) technology, which is increasingly being adopted in industrial electronic applications. To evaluate the contribution of the proposed DHB technique, investigations were carried out for each basic PWM, RPP, RSF, and DHB technique. Then a comparison was made of the performances achieved. The experimentally investigated features include the effect of each technique on the common-mode, differential-mode, and total conducted-noise characteristics, and their influence on the converter’s output ripple voltage.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.6
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• pp.715-720
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• 2016

This paper proposes a PWM (Pulse Width Modulation) voltage mode DC-DC step-up converter for portable devices. The converter, which is operated with a 1 MHz switching frequency, is capable of reducing the mounting area of passive devices, such as inductor and capacitor, and is suitable for compact mobile products. This step-up converter consists of a power stage and a control block. The circuit elements of the power stage are an inductor, output capacitor, MOS transistors Meanwhile, control block consist of OPAMP (operational amplifier), BGR (band gap reference), soft-start, hysteresis comparator, and non-overlap driver and some protection circuits (OVP, TSD, UVLO). The hysteresis comparator and non-overlapping drivers reduce the output ripple and the effects of noise to improve safety. The proposed step-up converter was designed and verified in Magnachip/Hynix 0.18um 1-poly, 6-metal CMOS process technology. The output voltage was 5 V with a 3.3 V input voltage, output current of 100 mA, output ripple less than 1% of the output voltage, and a switching frequency of 1 MHz. These designed DC-DC step-up converters could be applied to the Personal Digital Assistants(PDA), cellular Phones, Laptop Computer, etc.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.4
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• pp.659-666
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• 2006

Servo-motors are used as key components of automated system by performing precise motion control as accurate positioning and accurate speed regulation in response to the commands from computers and sensors. Especially, the linear brushless servo-motors have numerous advantages over the rotary servo motors which have connection with the friction induced transfer mechanism such as ball screws, timing belts, rack/pinion. This paper proposes an estimation method of unknown motor system parameters using the informations from the sinusoidal driving type linear brushless DC motor dynamics and outputs. The estimated parameters can be used to tune the controller gain and a disturbance observer. In order to meet this purpose high performance Digital Signal Processor, TMS320F240, designed originally for implementation of a Field Oriented Control(FOC) technology is adopted as a controller of the liner BLDC servo motor. Having A/D converters, PWM generators, rich I/O port internally, this servo motor application specific DSP play an important role in servo motor controller. This linear BLDC servo motor system also contains IPM(Intelligent Power Module) driver and hail sensor type current sensor module, photocoupler module for isolation of gate signals and fault signals.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.6
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• pp.486-494
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• 2012

In this paper, we proposes the three-phase embedded Z-source inverter consisting of the three embedded Z-source converters and it's the output voltage control method. Each embedded Z-source converter can produce the bipolar output capacitor voltages according to duty ratio D such as single-phase PWM inverter. The output AC voltage of the proposed system is obtained as the difference in the output capacitor voltages of each converter, and the L-C output filter is not required. Because the output AC voltage can be stepped up and down, the boost DC converter in the conventional two-stage inverter is unnecessary. To confirm the validity of the proposed system, PSIM simulation and a DSP based experiment were performed under the condition of the input DC voltage 38V, load $100{\Omega}$, and switching frequency 30kHz. Each converter is connected by Y-connection for three-phase loads. In case that the output phase voltage is the same $38V_{peak}$ as the input DC voltage and is the 1.5 times($57V_{peak}$), the simulation and experimental results ; capacitor voltages, output phase voltages, output line voltages, inductor currents, and switch voltages were verified and discussed.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.5
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• pp.43-50
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage -doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A high input power factor of 97[%] and an efficiency of 98[%] are also obtained. The harmonic guide lines of proposed rectifier is no interfered with inverter switching, resulting in a simple, reliable and low-cost ac-to dc converters in comparison with the boost-type current-improving circuits.It compared conventional pulse-widthmodulated(PWM)inverter with half pulse-widthmodulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switchingloss and holding over-shooting.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1904-1917
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• 2016

The moving average filter (MAF) is widely utilized to improve the disturbance rejection capability of phase-locked loops (PLLs). This is of vital significance for the grid-integration and stable operation of power electronic converters to electric power systems. However, the open-loop bandwidth is drastically reduced after incorporating a MAF into the PLL structure, which makes the dynamic response sluggish. To overcome this shortcoming, some new techniques have recently been proposed to improve the transient response of MAF-based PLLs. In this paper, a comprehensive performance comparison of advanced MAF-based PLL algorithms is presented. This comparison includes HPLL, MPLC-PLL, QT1-PLL, and DMAF-PLL. Various disturbances, such as grid voltage sag, voltage flicker, harmonics distortion, phase-angle and frequency jumps, DC offsets and noise, are considered to experimentally test the dynamic performances of these PLL algorithms. Finally, an improved positive sequence extraction method for a HPLL under the frequency jumps scenario is presented to compensate for the steady-state error caused by non-frequency adaptive DSC, and a satisfactory performance has been achieved.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.10
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• pp.581-586
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage-doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A circuit design method is shown by experimentation and confirmed simulation. The experimental results of the proposed diode rectifier satisfies the harmonic guide lines. A high input power factor of 97(%) and an efficiency of 98[%] are also obtained. The new rectifier with no controlled switches meet the harmonic guide lines, resulting in a simple, reliable and low-cost at-to dc converters in comparison with the boost-type current-improving circuits. This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. And this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit is constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduction and the power factor improvement. Half pulse-width modulated (HPWM) inverter was explained compared with conventional pulse width modulated(PWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Journal of Power Electronics
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• v.17 no.4
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• pp.1048-1057
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• 2017

An indirect matrix converter (IMC) is a modern power generation system that enables a direct ac/ac conversion without the need for any bulky and limited lifetime electrolytic capacitor. This system also allows four-quadrant operation, generation of sinusoidal output voltage waveforms with variable frequency and amplitude, and control of input power factor. This study proposes a pulse-width modulation-based sliding-mode controller to achieve unity input-power factor operation of the IMC independently of the active power exchanged with the grid, as well as a fast dynamic response. The designed equivalent control law determines, at each sampling period, the appropriate q-axis component of the modulated input current to be injected into the grid through the LC input filter. An integral term of the error is included in the expression of the sliding surface to increase the accuracy of the control method. A double space vector modulation method is used to synthesize the direction of the space vector of the input currents as required by the sliding-mode controller and the space vectors of the target output voltages. Simulation and experimental results are provided to show the effectiveness and evaluate the performance of the proposed control method.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1108-1121
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• 2019

The non-inverting buck-boost converter (NIBB) is a step-up and step-down DC-DC converter suitable for wide-input-voltage-range applications. However, when the input voltage is close to the output voltage, the NIBB needs to operate in the buck-boost mode, causing a significant efficiency reduction since all four switches operates in the PWM mode. Considering both the current stress limitation and the efficiency optimization, a novel design methodology for the optimal phase-shift modulation of a NIBB in the buck-boost mode is proposed in this paper. Since the four switches in the NIBB form two bridges, the shifted phase between the two bridges can serve as an extra degree of freedom for performance optimization. With general phase-shift modulation, the analytic current expressions for every duty ratio, shifted phase and input voltage are derived. Then with the two key factors in the NIBB, the converter efficiency and the switch current stress, taken into account, an objective function with constraints is derived. By optimizing the derived objective function over the full input voltage range, an offline design methodology for the optimal modulation scheme is proposed for efficiency optimization on the premise of current stress limitation. Finally, the designed optimal modulation scheme is implemented on a DSPs and the design methodology is verified with experimental results on a 300V-1.5kW NIBB prototype.