• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.11C
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• pp.1052-1057
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• 2006

The implement the adaptive partial response maximum likelihood (PRML) detector with tilt analyzer for asymmetric high-density optical storage system. For the estimation of disc tilt, we exploit spc patterns in each data frame. Because of using the ROM table to renew the coefficients of equalizer and reference values of branches, the complexity of the hardware is reduced. The proposed PRML has been designed and verified by VerilogHDL and synthesized by the Synopsys Design Compiler with Hynix $0.35{\mu}m$ STD cell library. In the result, the total gate count is 35K, and the maximum operating frequency is 140MHz.