• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.74-82
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• 2015

As the complexity of an electronic device and the reduction of its operating voltage is progressing, susceptibility test of the chip and module for internal or external noises is essential. Although the immunity compliance of the chip was served with IEC 62132-4 Direct Power Injection method as an industry standard, in fact, EM immunity of the chip is influenced by their Power Domain Network (PDN). This paper evaluates the EM noise tolerance of a PLL and compares their noise transfer characteristics to the PLL on various PCB boards. To make differences of the PDNs of PCBs, various PCBs with or without LDO and with several types of capacitors are tested. For evaluation of discrepancies between EM characteristics of an IC only and the IC on real boards, the analysis of the noise transfer characteristics according to the PDNs shows that it gives important information for the design having robust EM characteristics. DPI measurement results show that greatly improved immunity of the PLL in the low-frequency region according to using the LDO and a frequency change of the PLL according to the DPI could also check with TEM cell measurement spectrum.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.2
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• pp.109-116
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• 2005

The high performance drives of the slotless Permanent Magnet Brushless DC(PM BLDC) motor can be achieved by the current control, where the currents flow according to the rotor position and the current phase is suitably controlled according to the operational condition. Rotor position information can be provided by Hall-IC or sensorless algorithm. So, the Hall-ICs are set up in this motor to detect the main flux from the rotor. Instead of using three Hall-ICs and encoder, this paper uses only two Hall-ICs for the permanent magnet rotor position and the speed feedback signals, and uses a micro-controller of 16-bit type (80C196KC). Also because of low resolution obtained by using Hall-IC even low-cost and simple structure, to improve the wide range of speed response characteristic more exactly, we propose the rotor position signal synthesizer using PLL circuit based on two Hall-ICs.

• The Magazine of the IEIE
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• v.31 no.9
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• pp.90-108
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• 2004

• The Magazine of the IEIE
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• v.3 no.3
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• pp.46-53
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• 1976

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.533-534
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• 2008

This paper presents a multi-phase ring VCO for low-cost, low-power GPS receiver. In the RF band used in GPS, L1 band is now in commercial-use and L2,L5 are predicting to be commercial-use soon. Thus Wide band PLL and Cost-effective IC solutions are required for future multi-band GPS receiver that received three types band at once. A new PLL architecture for multi-band GPS application is proposed. Ring VCO is even smaller than LC-VCO and a good alternative for low-cost solution. Proposed multi-phase ring VCO offers wide frequency range covering L1, L2, and L5 band, 20% reduction of area, 23% reduction of PLL power and can generate I/Q without extra I/Q generator.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2568-2571
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• 2002

A LCD backlight inverter control IC based on the piezoelectric transformer (PZT) for Cold Cathode Fluorescent Lamp (CCFL) lighting is proposed. It is indeed a variable frequency, variable duty (VFVD) controller having dual feedback control loops for achieving both the regulation of lamp current and the maximum efficiency. The PWM controller regulates the lamp current, while the PLL controller tunes the operating frequency to the frequency that the efficiency of the combined LC-PZT resonator becomes maximum. The mixed PLL/PWM control technique lets the backlight inverter operate at the maximum efficiency in spite of the variation of component and environment. The controller features include a protection for an open or broken lamps, and an open lamp regulation.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.277-280
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• 2005

In this paper, we propose a frequency synthesizer for dualband repeater. The dual-band RF technology for applications to the wireless repeater for CDMA and WCDMA mobile communications has been developed in this paper. The dualband PLL module consisted of dual-band VCO and one PLL IC has been developed. The main technological efforts for the dual-band PLL module is to suppress the intermodulation distortion by applying the miniature ceramic filter using the slow wave characteristics. The dual-band miniature RF module including dual-band PLL module and one MCU controller is very attractive for applications to the miniature dual-band RF mobile repeaters.

• Journal of Yeungnam Medical Science
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• v.6 no.2
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• pp.217-222
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• 1989

In this study, high frequency oscillatory ventilator was designed and constructed. Using designed by phase-lock loop system, in order to accurately and easily treat both the outlet volume and rpm. A system has been designed and is being evaluated using CD4046A PLL IC. We use this PLL IC for the purpose of motor controls. The device consists of PLL system, pumping mechanism, piston, cylinder, and special crank shaft are required. This system characteristics were as follows : 1) Frequency : 20-1800rpm. 2) Outlet air volume : 1-50cc.

• Journal of Power Electronics
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• v.12 no.6
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• pp.886-894
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• 2012

This paper presents a secondary-side, dual-mode feedback LLC resonant controller IC with dynamic PWM dimming for LED backlight units. In order to reduce the cost, master and slave outputs can be generated simultaneously with a single LLC resonant core based on dual-mode feedback topologies. Pulse Frequency Modulation (PFM) and Pulse Width Modulation (PWM) schemes are used for the master stage and slave stage, respectively. In order to guarantee the correct dual feedback operation, Phased-Locked Loop (PLL)-based automatic duty control circuit is proposed in this paper. The chip is fabricated using $0.35{\mu}m$ Bipolar-CMOS-DMOS (BCD) technology, and the die size is $2.5mm{\times}2.5mm$. The frequency of the gate driver (GDA/GDB) in the clock generator ranges from 50 to 425 kHz. The current consumption of the LLC resonant controller IC is 40 mA for a 100 kHz operation frequency using a 15 V supply. The duty ratio of the slave stage can be controlled from 40% to 60% independent of the frequency of the master stage.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.874-877
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• 1987

In this paper a DPLL circuit realizable by digital IC's is propose and the principles of general DPLL are described. An all Digital phase locked loop is designed, analyzed, and tested. In particular, the approach of invoking Gaussian assumption on the decision variable and based on S.O.Rices theory is used. As a performance of the above PLL detector operating on low data rate FSK is given and demonsrtated to be FSK reception.