• Title/Summary/Keyword: PLC Simulation

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Control Level Process Modeling Methodology Based on PLC (PLC 기반 제어정보 모델링 방법론)

  • Ko, Min-Suk;Kwak, Jong-Geun;Wang, Gi-Nam;Park, Sang-Chul
    • Journal of the Korea Society for Simulation
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    • v.18 no.4
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    • pp.67-79
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    • 2009
  • Because a product in the car industry has a short life cycle in recent years, the process planning and the manufacturing lines have to be changed frequently. Most of time, repositioning an existing facility and modifying used control information are faster than making completely new process planning. However, control information and control code such as PLC code are difficult to understand. Hence, industries prefer writing a new control code instead of using the existing complex one. It shows the lack of information reusability in the existing process planning. As a result, to reduce this redundancy and lack of reusability, we propose a SOS-Net modeling method. SOS-Net is a standard methodology used to describe control information. It is based on the Device Structure which consists of sensor information derived from device hardware information. Thus, SOS-Net can describe a real control state for automated manufacturing systems. The SOS-Net model is easy to understand and can be converted into PLC Code easily. It also enables to modify control information, thus increases the reusability of the new process planning. Proposed model in this paper plays an intermediary role between the process planning and PLC code generation. It can reduce the process planning and implementation time as well as cost.

Optimization for Relay-Assisted Broadband Power Line Communication Systems with QoS Requirements Under Time-varying Channel Conditions

  • Wu, Xiaolin;Zhu, Bin;Wang, Yang;Rong, Yue
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.10
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    • pp.4865-4886
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    • 2017
  • The user experience of practical indoor power line communication (PLC) applications is greatly affected by the system quality-of-service (QoS) criteria. With a general broadcast-and-multi-access (BMA) relay scheme, in this work we investigate the joint source and relay power optimization of the amplify-and-forward (AF) relay systems used under indoor broad-band PLC environments. To achieve both time diversity and spatial diversity from the relay-involved PLC channel, which is time-varying in nature, the source node has been configured to transmit an identical message twice in the first and second signalling phase, respectively. The QoS constrained power allocation problem is not convex, which makes the global optimal solution is computationally intractable. To solve this problem, an alternating optimization (AO) method has been adopted and decomposes this problem into three convex/quasi-convex sub-problems. Simulation results show the fast convergence and short delay of the proposed algorithm under realistic relay-involved PLC channels. Compared with the two-hop and broadcast-and-forward (BF) relay systems, the proposed general relay system meets the same QoS requirement with less network power assumption.

Study on Very High-Rate Power Line Communications for Smart Grid (스마트그리드를 위한 초고속 전력선통신기술 연구)

  • Choi, Sung-Soo;Oh, Hui-Myoung;Kim, Young-Sun;Kim, Yong-Hwa
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.6
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    • pp.1255-1260
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    • 2011
  • In this paper, we study on the reliability of Very High-rate Power Line Communication (VH-PLC) for Smart Grid, so that the resultant data rate is over 400Mbps at a physical layer. Firstly, reviewing the research trend of the PLC, we discuss the required techniques for supporting the Smart Grid. Considering a pre-specification with the value of several parameters, we investigate a multi-carrier modulation technique to overcome limitations of higher rate transmission under power line channel environments. Then, we propose a system specification of the VH-PLC in the sense of enhancing two features. One is resolving the problem of the co-existence of the deployed high-speed PLC according to the published standardization of KS X 4600-1 in Korea. The other is getting better performance on the grid adopting the diverse element techniques, such as multi-carrier modulation, a subcarrier utilization mode, a variable rate LDPC (Low Density Parity Check) code, and a time and frequency diversity technique. Further, a simulation tool, composed of an Event-Driven simulator and a Time-Driven simulator, is developed for the purpose of verifying the system performance and continuously cross-checking the test bench signal of the proposed VH-PLC system.

Iterative Coding for High Speed Power Line Communication Systems (고속 전력선 통신 시스템을 위한 반복 부호화 기법)

  • Kim, Yo-Cheol;Cho, Bong-Youl;Lee, Jae-Jo;Kim, Jin-Young
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.11 no.5
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    • pp.185-192
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    • 2011
  • In this paper, we simulate and analyze performance of iterative coding scheme, double binary turbo code, for high speed power line communication (PLC) systems. PLC system has hostile environment for high speed data transmission, so error correction method is necessary to compensate effects of PLC channel. We employ the PLC model proposed by M. Zimmerman and Middleton Class A interference model, and system performance is evaluated in terms of bit error rate (BER). From the simulation results, we confirm double binary turbo code provides considerable coding gains to PLC system and BER performance is significantly improved as the number of iteration increase. It is also confirmed that BER performance increases as code rate is lager, while it decreases as the code rate is smaller.

Study on Efficient Impulsive Noise Mitigation for Power Line Communication

  • Seo, Sung-Il
    • International journal of advanced smart convergence
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    • v.8 no.2
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    • pp.199-203
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    • 2019
  • In this paper, we propose the efficient impulsive noise mitigation scheme for power line communication (PLC) systems in smart grid applications. The proposed scheme estimates the channel impulsive noise information of receiver by applying machine learning. Then, the estimated impulsive noise is updated in data base. In the modulator, the impulsive noise which reduces the PLC performance is effectively mitigated through proposed technique. As an impulsive noise model, Middleton Class A interference model was employed. The performance is evaluated in terms of bit error rate (BER). From the simulation results, it is confirmed that the proposed scheme has better BER performance compared to the conventional model. As a result, the proposed noise mitigation improves the signal quality of PLC systems by effectively removing the channel noise. The results of the paper can be applied to PLC systems for smart grid.

A Study of Interference-Free Home PLC based on the Binary ZCD Code (연속직교 상관특성을 갖는 아진 코드 기반의 구내용 PLC에 관한 연구)

  • Cha, Jae-Sang;Kim, Seong-Kweon
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.2
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    • pp.38-44
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    • 2006
  • In this paper, a new interference-free Home CDMA-PLC(Code Division Multiple Access-Power Line Communication) system based on the binary ZCD(Zero Correlation Duration) spreading code is proposed as a key solution to overcome the previous problems. Binary ZCD spreading code sets with enlarged family sizes are generated by carrying out a chip-shift operation of the preferred pairs. The properties or the proposed ZCD-PLC systems are effective for MPI(Multi-Path Interference) and MAI (Multiple Access Interference) cancellation in the CDMA-PLC systems. By BER performance simulation, we certified the availability of proposed ZCD-CDMA-PLC system.

Channel Capacity Analysis for Indoor PLC Networks with Considering the Effect of Loading conditions of Networks on Channel State Information (네트워크 부하 조건의 변화가 채널 상태 정보에 미치는 영향을 고려한 옥내 전력선 통신 채널의 채널 용량 분석)

  • Shin, Jae-Young;Jeong, Ji-Chai
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.2
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    • pp.252-256
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    • 2011
  • We analyze the channel capacity with considering the effect of the loading conditions of indoor PLC networks on channel state information. We consider various numbers of load for two kinds of the networks with regular length branches and a deployed network of indoor PLC. For calculating the channel capacity degradation, two noise scenarios and impedances are considered. From the simulation results, we suggest the robust regression lines for modeling the channel capacity degradation. In the cases of 0 $\Omega$ and $Z_0$ loads, natural log and linear function curve show the best goodness of fit, respectively. For the deployed indoor PLC network with 0 $\Omega$ loads, compared with the networks with regular length branches, the goodness of fit decreases by the amount of 0.12 and 0.15 for low noise and high noise scenarios, respectively. Using the regression lines, we can estimate the channel capacity degradation without measurement.

Study on the method of Block processing by SFC (SFC에 의한 권역별 처리 방법에 관한 연구)

  • You, Jeong-Bong
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.273-275
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    • 2006
  • Ladder Diagram(LD) is the most widely utilized among many sorts of existing programs using for the design of process control system. But it is very difficult to grasp sequential flow of control logic. In this paper, we proposed the method that we can control a lot of blocks. We used PLC in process control system. And, in order to design we used Sequential Function Chart(SFC). In this paper, we proposed the method of block contro. and confirmed feasibility through a simulation.

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Performance of a Multi-Code CDMA Scheme on Non-Gaussian Noises in Power Line Communication Channels

  • Na, Sung-Ju;Yoan Shin
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.132-135
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    • 2000
  • In this paper, we propose to exploit a multi-code CDMA scheme for power line communication (PLC) systems, and its performance on non-Gaussian impulse and harmonic noises is presented. The proposed multi-code CDMA scheme utilizes convolutional coding and block interleaving to combat with the non-Gaussian noises, and simulation results indicate effective alleviation of these noises, and thus significant bit error rate improvement by the proposed scheme even under strict restriction of frequency band allowed in PLC systems.

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A New input-filtering method for High Speed Counter module of PLC using embedded timer pulse function of general purpose MPU (범용 MPU 내장 타이머 펄스 출력을 이용한 PLC 고속 카운터 모듈의 입력 필터링 기능 개선)

  • Park, Kang-Hee;Lee, Sang-Beak;Han, Kyoung-Sik
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1798-1799
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    • 2011
  • In this paper, A new cost-effective and accurate input noise rejection method for High Speed Counter module of PLC (Programmable Logic Controller) is proposed. By using combination of simple additional logic circuit and the Timer Pulse function of general purpose MPU, Cost-effectiveness and improvement of accuracy of filtering function can be achieved. This proposed method is verified by simulation. This proposed method is much useful for simple industrial controller based on simple microprocessor because of simplicity, accuracy and low cost.

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