• Title/Summary/Keyword: PCI Express

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Flash Operation Group Scheduling for Supporting QoS of SSD I/O Request Streams (SSD 입출력 요청 스트림들의 QoS 지원을 위한 플래시 연산 그룹 스케줄링)

  • Lee, Eungyu;Won, Sun;Lee, Joonwoo;Kim, Kanghee;Nam, Eyeehyun
    • Journal of KIISE
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    • v.42 no.12
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    • pp.1480-1485
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    • 2015
  • As SSDs are increasingly being used as high-performance storage or caches, attention is increasingly paid to the provision of SSDs with Quality-of-Service for I/O request streams of various applications in server systems. Since most SSDs are using the AHCI controller interface on a SATA bus, it is not possible to provide a differentiated service by distinguishing each I/O stream from others within the SSD. However, since a new SSD interface, the NVME controller interface on a PCI Express bus, has been proposed, it is now possible to recognize each I/O stream and schedule I/O requests within the SSD for differentiated services. This paper proposes Flash Operation Group Scheduling within NVME-based flash storage devices, and demonstrates through QEMU-based simulation that we can achieve a proportional bandwidth share for each I/O stream.

An Approach for Implementing PCI Express Interface Based Storage System for Wideband Observation Data

  • Song, Min-Gyu;Kang, Yong-Woo;Kim, Hyo-Ryung;Nam, Uk-Won
    • The Bulletin of The Korean Astronomical Society
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    • v.40 no.2
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    • pp.57.1-57.1
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    • 2015
  • VLBI에서 관측 대역폭이 n배 증가될 경우 관측감도는 sqrt(n)만큼 향상되고, 이는 관측 연구 측면에서 기존에는 불가능하던 천체에 대한 연구 수행이 가능함을 의미한다. 관측 대역폭의 확대는 관측 데이터의 용량 증가를 의미하며 여기서 해당 데이터의 처리를 위한 초고속 데이터 기록시스템은 핵심적 역할을 한다. 이에 따라 현재 KVN에서는 미국 MIT Haystack 천문대에서 개발된 초고속 기록시스템인 Mark5B/B+와 Mark6를 운용 중에 있다. 하지만 이들 시스템의 경우 사실상 VLBI연구를 위한 목표로 특수 개발되었기에 유지 및 운영 측면에서 여러 불편이 있고, 성능에 있어서도 단일 스트림 기준으로 8Gbps를 넘지 못하는 한계를 안고 있다. 본 발표에서는 기존 시스템을 대체할 수 있는 기술로서 PCI 익스프레스 기반의 데이터 처리를 소개하고자 한다. 나아가 실제 관측 데이터에 대한 입출력 및 기존 시스템과의 성능 비교를 통해 광대역 관측 연구에 최적화된 기록 시스템을 제안하고자 한다.

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A Study of Technology Trends for Effective Process Control under Non-Normal Distribution (비정규분포하에서의 효과적 공정관리를 위한 기술체계동향 연구)

  • Kim, Jong-Gurl;Um, Sang-Joon;Kim, Young-Sub;Ko, Jae-Kyu
    • Proceedings of the Safety Management and Science Conference
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    • 2008.11a
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    • pp.599-610
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    • 2008
  • It is an important and urgent issue to improve process capability in quality control. Process capability refers to the uniformity of the process. The variability in the process is a measure of the uniformity of output. A simple, quantitative way to express process capability, the degree of variability from target in specification is defined by process capability index(PCI). Almost process capability indices are defined under normal distribution. However, these indices can not be applied to the process of non-normal distribution including reliability. We investigate current research on the process of non-normal distribution, and advanced method and technology for developing more reliable and efficient PCI. Finally we suggest the perspective for future study.

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Jitter Measurements in High-Speed Serial Data Signals (고속직렬데이터의 지터 측정방법)

  • Kwon, W.O.;Kim, S.W.;Kim, M.J.
    • Electronics and Telecommunications Trends
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    • v.20 no.3 s.93
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    • pp.112-121
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    • 2005
  • 고속직렬프로토콜의 출현으로 기존의 병렬 인터페이스에서 중요하게 사용되던 파라미터들의 의미가 변화되고 있다. 특히 ‘1’, ‘0’의 디지털 신호가 고속의 차동신호로 전송되면서 신호 무결성의 파라미터로 지터(jitter)가 중요한 의미를 가지게 되었다. 본 고는 지터의 발생과 분석, 테스트 등 전분야를 다루고 있다. 지터를 분석하기 위한 방법으로 Eye Diagram, Bathtub 곡선, TIE 히스토그램 등을 다루며 이러한 방법을 사용하여 지터를 각각의 특성별로 분리한다. 그리고 지터를 테스트 장비와 각각의 특징을 살펴본 후 PCI Express 트랜시버 지터 테스트의 실례를 통하여 지터 테스트 방법과 분석을 보여준다.

Implementation of External Memory Expansion Device for Large Image Processing (대규모 영상처리를 위한 외장 메모리 확장장치의 구현)

  • Choi, Yongseok;Lee, Hyejin
    • Journal of Broadcast Engineering
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    • v.23 no.5
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    • pp.606-613
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    • 2018
  • This study is concerned with implementing an external memory expansion device for large-scale image processing. It consists of an external memory adapter card with a PCI(Peripheral Component Interconnect) Express Gen3 x8 interface mounted on a graphics workstation for image processing and an external memory board with external DDR(Dual Data Rate) memory. The connection between the memory adapter card and the external memory board is made through the optical interface. In order to access the external memory, both Programmable I/O and DMA(Direct Memory Access) methods can be used to efficiently transmit and receive image data. We implemented the result of this study using the boards equipped with Altera Stratix V FPGA(Field Programmable Gate Array) and 40G optical transceiver and the test result shows 1.6GB/s bandwidth performance.. It can handle one channel of 4K UHD(Ultra High Density) image. We will continue our study in the future for showing bandwidth of 3GB/s or more.

Development of FPGA-based Meteorological Information Data Receiver Circuit for Low-Cost Meteorological Information Receiver System for COMS (보급형 천리안 위성 기상정보 수신시스템을 위한 FPGA 기반 기상정보 데이터 수신회로 개발)

  • Ryu, Sang-Moon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.10
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    • pp.2373-2379
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    • 2015
  • COMS(Communication, Ocean and Meteorological Satellite), the first Korean geostationary meteorological satellite, provides free meteorological information through HRIT/LRIT(High/Low Rate Information Transmission) service. This work presents the development of data receiver circuit that is essential to the implementation of a low-cost meteorological information receiver system. The data receiver circuit processes the data units according to the specification of physical layer and data link layer of HRIT/LRIT service. For this purpose, the circuit consists of a Viterbi decoder, a sync. word detector, a derandomizer, a Reed-Solomon decoder and so on. The circuit also supports PCI express interface to pass the information data on to the host PC. The circuit was implemented on an FPGA(field programmable gate array) and its function was verified through simulations and hardware implementation.

Design and Implementation of 5G mmWave LTE-TDD HD Video Streaming System for USRP RIO SDR (USRP RIO SDR을 이용한 5G 밀리미터파 LTE-TDD HD 비디오 스트리밍 시스템 설계 및 구현)

  • Gwag, Gyoung-Hun;Shin, Bong-Deug;Park, Dong-Wook;Eo, Yun-Seong;Oh, Hyuk-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.5
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    • pp.445-453
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    • 2016
  • This paper presents the implementation and design of the 1T-1R wireless HD video streaming systems over 28 GHz mmWave frequency using 3GPP LTE-TDD standard on NI USRP RIO SDR platform. The baseband of the system uses USRP RIO that are stored in Xilinx Kintex-7 chip to implement LTE-TDD transceiver modem, the signal that are transceived from USRP RIO up or down converts to 28 GHz by using self-designed 28 GHz RF transceiver modules and it is finally communicated HD video data through self-designed $4{\times}8$ sub array antennas. It is that communication method between USRP RIO and Host PC use PCI express ${\times}4$ to minimize delay of data to transmit and receive. The implemented system show high error vector magnitude performance above 25.85 dBc and to transceive HD video in experiment environment anywhere.

Design and Implementation of Adaptive Beam-forming System for Wi-Fi Systems (무선랜 시스템을 위한 적응형 빔포밍 시스템의 설계 및 구현)

  • Oh, Joohyeon;Gwag, Gyounghun;Oh, Youngseok;Cho, Sungmin;Oh, Hyukjun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.9
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    • pp.2109-2116
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    • 2014
  • This paper presents the implementation and design of the advanced WI-FI systems with beam-forming antenna that radiate their power to the direction of user equipment to improve the overall throughput, contrast to the general WI-FI systems equipped with omni-antenna. The system consists of patch array antenna, DSP, FPGA, and Qualcomm's commercial chip. The beam-forming system on the FPGA utilizes the packet information from Qualcomm's commercial chip to control the phase shifters and attenuators of the patch array antenna. The PCI express interface has been used to maximize the communication speed between DSP and FPGA. The directions of arrival of users are managed using the database, and each user is distinguished by the MAC address given from the packet information. When the system wants to transmit a packet to one user, it forms beams to the direction of arrival of the corresponding user stored in the database to maximize the throughput. Directions of arrival of users are estimated using the received preamble in the packet to make its SINR as high as possible. The proposed beam-forming system was implemented using an FPGA and Qualcommm's commercial chip together. The implemented system showed considerable throughput improvement over the existing general AP system with omni-directional antenna in the multi-user communication environment.

Analysis of I/O Response Time Throughout NVMe Driver Implementation Architectures (NVMe 드라이버 구현 방식에 따른 I/O 응답시간 분석)

  • Kang, Ingu;Joo, Yongsoo;Lim, Sung-Soo
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.3
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    • pp.139-147
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    • 2017
  • In recent years, non-volatile memory express (NVMe), a new host controller interface standard, has been adapted to overcome performance bottlenecks caused by the acceleration of solid state drives (SSD). Recently, performance breakthrough cases over AHCI based SATA SSDs by adapting NVMe based PCI Express (PCIe) SSD to servers and PCs have been reported. Furthermore, replacing legacy eMMC-flash storage with NVMe based storage is also considered for next generation of mobile devices such as smartphones. The Linux kernel includes drivers for NVMe support, and as the kernel version increases, the implementation of the NVMe driver code has changed. However, mobile devices are often equipped with older versions of Android operating systems (OSes), where the newest features of NVMe drivers are not available. Therefore, different features of different NVMe driver implementations are not well evaluated on Android OSes. In this paper, we analyze the response time of the NVMe driver for various Linux kernel version.

A Performance Evaluation for IPoIB Protocol in Channel based Network (채널기반형 네트웍에서의 IPoIB 프로토콜 성능평가)

  • Jeon, Ki-Man;Min, Soo-Young;Kim, Young-Wan
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.687-689
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    • 2004
  • As using of network increases rapidly, performance of system has been deteriorating because of the overhead and bottleneck. Nowadays, High speed I/O network standard, that is a sort of PCI Express, HyperTransport, InfiniBand, and so on, has come out to improve the limites of traditional I/O bus. The InfiniBand Architecture(IBA) provides some protocols to service the applications such as SDP, SRP and IPoIB. In our paper, We explain the architecture of IPoIB (IP over InfiniBand) and its features in channel based I/O network. And so we provide a performance evaluation result of IPoIB which is compared with current network protocol. Our experimental results also show that IPoIB is batter than TCP/IP protocol. For this test, We use the dual processor server systems and Linux Redhat 9.0 operating system.

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