• 설비공학논문집
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• 제13권6호
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• pp.462-473
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• 2001

Due to the coupling between momentum and energy transport theoretical analysis of the loop performance is very complicate, therefore it is necessary that these problems be solved by experimental investigation before applying th loop thermosyphon to heat exchanger design. The evaporator and condenser of the loop thermosyphon were made of carbon-steel, and distilled water was used as working fluid in the experiments. From the experimental data correlations of heat transfer coefficient for evaporator and condenser sections were obtained. For heat fluxes in th range of 13~78kW/$m^2$, the correlation equations of heat transfer coefficients in evaporator and condenser predict the experimental behavior to within $\p$\pm$5% and\;\pm20$% respectively.

• Nuclear Engineering and Technology
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• 제53권2호
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• pp.688-694
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• 2021

The aim of this work is the analysis, design and hardware implementation of the fractional-order point kinetics (FNPK) model along with its closed-loop controller. The stability and closed-loop control of FNPK models are critical issues. The closed-loop stability of the controller-plant structure is established. Further, the designed PI/PD controllers are implemented in real-time on a DSP processor. The simulation and real-time hardware studies confirm that the designed PI/PD controllers result in a damped stable closed-loop response.

• Journal of Animal Science and Technology
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• 제58권3호
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• pp.13.1-13.7
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• 2016

Background: In the present study, various freezing containers were tested for mouse embryos of respective developmental stages; embryos were vitrified and then their survival rate and developmental rate were monitored. Mouse two cell, 8 cell, and blastula stage embryos underwent vitrification freezing-thawing and then their recovery rate, survival rate, development rate, and hatching rate were investigated. Methods: EM-grid, OPS, and cryo-loop were utilized for vitrification freezing-thawing of mouse embryos. Results: It was found that recovery rate and survival rate were higher in the group of cryo-loop compared to those of EM-grid (p < 0.05). Embryonic development rate, two cell embryos to blastocyst, as well as hatching rate were higher in the control group compared to the EM-grid group and OPS group (p < 0.05), yet no difference was noted between the control group and cryo-loop group. Development rate and hatching rate of eight cell morulae and blastocysts were all lower in the treatment groups than the control group whilst hatching rate of blastocysts was higher in the control group compared to the groups of EM-grid and OPS (p < 0.05); although the cryo-loop group was shown to be slightly higher than other groups, it was not statistically significant. Conclusions: In the study, we investigate effects of freezing containers on vitrified embryos of respective developmental stages; it was demonstrated that higher developmental rate was shown in more progressed (or developed) embryos with more blastomeres. There was however, no difference in embryonic development rate was shown amongst containers. Taken together, further additional studies are warranted with regards to 1) manipulation techniques of embryos for various vitrification freezing containers and 2) preventive measures against contamination via liquid nitrogen.

• Korean Chemical Engineering Research
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• 제52권4호
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• pp.522-529
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• 2014

연소전 $CO_2$ 포집용 SEWGS 시스템의 SEWGS 반응기와 재생반응기 사이의 고체순환을 위해 SEWGS 반응기 - 하부루프실 - 재생반응기 - 상승관 - 사이클론 - 상부 루프실로 구성된 순환유동층 시스템을 사용하고 있다. 현재 시스템의 경우 수직형 하부 루프실을 사용하고 있으나 하부 루프실의 유동화 및 안정적인 고체순환을 위해 유량이 많이 필요하고 가끔씩 슬러그가 발생하였다. 본 연구에서는 새로운 하부 루프실 형태로 경사형 하부 루프실을 제안하였으며, 상온, 상압 조건에서 $CO_2$ 흡수제(P-78)를 층물질로 사용하여 기포유동층-기포유동층-고속유동층 형태의 순환유동층 실험장치를 이용하여 하부 루프실의 형태 변화에 따른 고체순환특성을 측정 및 비교하였다. 경사형 하부루프실의 경우가 수직형인 경우보다 적은 유량으로 안정적인 고체순환을 유지할 수 있었으며 두 반응기 사이의 고체층 높이 차이도 발생하지 않는 것으로 나타나 경사형 하부 루프실을 사용하는 것이 유리한 것으로 결론지을 수 있었다.

• 전기학회논문지P
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• 제64권3호
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• pp.111-115
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• 2015

Recently, protection coordination issues can occur due to increased fault current in power system when power system being changed radial power system to grid system such as loop power system, micro grid and smart grid. This paper analyzed Recloser-Fuse coordination in loop power distribution system with Superconducting Fault Current Limiters(SFCLs) when single line ground fault occur in loop power distribution system with SFCLs. We analyzed Recloser-Fuse Coordination in radial power distribution system and changed coordination caused by increased Fault current because of loop system when single line ground fault occur in power distribution system. This paper simulated to improve changed coordination using SFCLs in loop power distribution system. Power distribution system, SFCLs and protective devices are modeled using PSCAD/EMTDC.

• 한국유변학회:학술대회논문집
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• 한국유변학회 2003년도 춘계학술발표회 논문집
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• pp.33-36
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• 2003

No Abstract, See Full Text

• 한국정보통신학회논문지
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• 제20권12호
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• pp.2326-2332
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• 2016

본 논문에서는 기존 위상고정루프의 아날로그 루프 필터 형태와 달리 전압제어발진기의 출력 신호로 동작하는 이산 루프 필터를 사용하여 크기는 작으면서 안정하게 동작하는 위상고정루프를 제안하였다. 기존의 위상고정루프에 2차 루프필터 대신 스위치 제어 루프필터를 사용하였다. 스위치는 전압제어발진기위의 고속의 출력 신호에 의해 제어된다. 총 3개의 스위치는 UP/DN 신호를 통하여 제어되고, UP/DN 신호에 따라 스위치가 'on/off'를 반복한다. 샘플링과 부궤환 역할을 하는 스위치와 결합된 작은 크기의 커패시터로 하나의 칩으로 집적화가 가능하다. 제안된 위상고정루프의 이산 루프 필터에 사용된 커패시터 값은 총 180pF로 아주 작은 크기임에도 불구하고 안정적으로 동작한다. 제안된 위상고정루프는 1.8V의 공급전압에서 0.18um CMOS 공정의 파라미터를 이용하여 Hspice로 시뮬레이션을 수행하고, 동작을 검증하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권4호
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• pp.506-517
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• 2015

This paper presents a 1.248 Gb/s - 2.918 Gb/s low-power receiver MIPI-DigRF M-PHY with a fully digital frequency detection loop. MIPI-DigRF M-PHY should be operated in a very short training time which is $0.01{\mu}s$ the for HS-G2B mode. Because of this short SYNC pattern, clock and data recovery (CDR) should have extremely fast locking time. Thus, the quarter rate CDR with a fully digital frequency detection loop is proposed to implement a fast phase tracking loop. Also, a low power CDR architecture, deserializer and voltage controlled oscillator (VCO) are proposed to meet the low power requirement of MIPI-DigRF M-PHY. This chip is fabricated using a $0.11{\mu}m$ CMOS process, and the die area is $600{\mu}m{\times}250{\mu}m$. The power consumption of the receiver is 16 mW from the supply voltage of 1.1 V. The measured lock time of the CDR is less than 20 ns. The measured rms and peak jitter are $35.24ps_{p-p}$ and $4.25ps_{rms}$ respectively for HS-G2 mode.

• Nuclear Engineering and Technology
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• 제56권6호
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• pp.2282-2291
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• 2024

In this work we study the effects of different factors of dislocation loop on its obstacle strength when interacting with an edge dislocation. At first, the interaction model for dislocation and dislocation loop is established and the full and partial absorption mechanism is obtained. Then, the effect of temperature, size and burgers vector of dislocation loop are investigated. The relation between the obstacle strength and irradiation dose has been established, which bridges the irradiation source and microscale properties. Except that, the obstacle strength of C, Cr, Ni, Mn, Mo and P decorated dislocation loop is studied. Results show that the obstacle strength for dislocation loop decorated by alloy element decreases in the sequence of Cr, Ni, Mn, C, P and Mo, which could be used to help parameterize and validate crystal plasticity finite element model and therein integrated constitutive laws to enable accounting for irradiation-induced chemical segregation effects.

• 전기전자학회논문지
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• 제21권4호
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• pp.416-419
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• 2017

본 논문에서는 고속 DDR3/DDR4 SDRAM을 위한 새로운 디지털 지연고정루프 (delay-locked loop: DLL)를 제안한다. 제안하는 디지털 DLL은 디지털 지연라인의 boundary switching 문제에 의한 jitter 증가 문제를 제거하기 위하여 위상보간 (phase interpolation) 방식의 파인지연라인 (fine delay line)을 채택하였다. 또한, 제안하는 디지털 DLL은 harmonic lock 문제를 제거하기 위하여 새로운 점진직 검색 (gradual search) 알고리즘을 사용한다. 제안하는 디지털 DLL은 1.1V, 38-nm CMOS DRAM 공정으로 설계되었으며, 0.25-2.0 GHz의 주파수 동작 영역을 가진다. 2.0 GHz에서 1.1 ps의 피크-투-피크 (p-p) 지터를 가지며, 약 13 mW의 전력소모를 가진다.