• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.2
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• pp.182-189
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• 2012

In this paper, the input current and output voltage ripple of the soft switching interleaved boost converter was analyzed. Ripples of input current and output voltage with an interleaved method is analysed and as a result, the facts that it has lower ripple current than conventional interleaved method is verified. it means that a capacity of a main inductor can be reduced. Besides, a low capacitance of capacitor which means high lifetime and confidence can be used because of reducing ripples of output voltage. In order to verify the validity of the proposed converter used 10uF film capacitor, experiment was performed, and the efficiency of the proposed converter was measured with variable load and duty conditions.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.963_964
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• 2009

This paper presents an output ripple reduction of Active-Clamp Forward Converter, which is mainly composed of interleaving two active-clamping forward converters. By interleaving, Output ripple is reduced. The leakage inductance of the transformer or an additional resonant inductance is employed to achieve ZVS during the dead times. The duty cycles are not limited to be equal and within 50%. The complementary switching and the resulted interleaved output inductor currents diminish the current ripple in output capacitors. Accordingly, the smaller output chokes and capacitors lower the converter volume and increase the power density. Detailed analysis of this ouput reduction of Active-Clamp Forward Converter is described.

• Journal of Electrical Engineering and Technology
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• v.10 no.6
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• pp.2307-2314
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• 2015

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1036-1045
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• 2016

This paper presents a novel control strategy for passive output filter reduction using an active output filter. The proposed method achieves the dual-function of regulating the output voltage ripple and output voltage variation during load transients. The novel control strategy allows traditional simple voltage controllers to be used, without requiring the expensive current sensors and complex controllers used in conventional approaches. The proposed method is verified with results from a 125-W forward converter.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.575-578
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• 2003

This paper presents a new current control method to reduce torque ripple of Brushless DC Motor during commutation. In the proposed control strategy, the current slopes of rising and decaying phase during commutation is equalized by the compensation voltage. By adding the compensation voltage for it to the current controller output, the reduced torque ripple can be obtained. The simulation and experimental results show that the proposed method reduces the torque and the current ripples significantly.

• Journal of Power Electronics
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• v.15 no.2
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.9
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• pp.1720-1727
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• 2009

This paper presents that generation and propagation mechanism of low frequency current ripples generated by a rectification effect of an inverter in fuel cell generation system is analyzed. The ripple reduction methode using hardware components such as capacitors and inductors is examined to reduce low frequency current ripples. A new fast and robust low frequency current ripple elimination algorithm is then proposed to incorporate a single loop current controller, which directly controls fuel cell current, without any extra hardware. The proposed algorithm can completely eliminate this current ripple as well as an overshoot or undershoot is significantly reduced. And the de link voltage and output current are well regulated by inverter controller. The validity of proposed algorithm is verified both computer simulation using PSIM 6.0 and experiment with a 1kW laboratory prototype.

• Journal of Power Electronics
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• v.19 no.3
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• pp.665-675
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• 2019

Renewable energy based on photovoltaic systems is beginning to play an important role to supply power to remote areas all over the world. Owing to the lower output voltage of photovoltaic arrays, high gain DC-DC converters with a high efficiency are required in practice. This paper presents a novel interleaved DC-DC boost converter with a high voltage gain, where the input terminal is interlaced in parallel and the output terminal is staggered in series (IPOSB). The IPOSB configuration can reduce input current ripples because two inductors are interlaced in parallel. The double output capacitors are charged in staggered parallel and discharged in series for the load. Therefore, IPOSB can attain a high step-up conversion and a lower output voltage ripple. In addtion, the output voltage can be automatically divided by two capacitors, without the need for extra sharing control methods. At the same time, the voltage stress of the power devices is lowered. The inrush current problem of capacitors is restrained by the inductor when compared with high gain converters with a switching-capacitor structure. The working principle and steady-state characteristics of the converter are analyzed in detail. The correctness of the theoretical analysis is verified by experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.6
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• pp.1003-1011
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• 2008

In this paper, optimal design of interleaved boost converters is studied in order to design low ripple, size, loss and high performance converters for fuel cell applications. Also, the process of optimal design of interleaved boost converter has been performed. Input current ripple, output voltage ripple, losses and capacity of electrical components are theoretically analyzed and informative simulation and experimental results are provided.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.3
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• pp.81-89
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• 2002

The sensorless AC motor drive is a popular topic of study due to the cost and reliability of speed and position sensors. Most sensorless algorithms are based on the mathematical modeling of motors including electrical variables such as phase current and voltage. Therefore, the accuracy of such variables largely affects the performance of the sensorless AC motor drive. However, the output voltage of the SVPWM-VSI, which is widely used in sensorless AC motor drives, has considerable errors. In particular, the SVPWM-VSI is error-prone in the low speed range because the constant DC link voltage causes poor resolution in a low output voltage command and the output voltage is distorted due to dead time and voltage drop. This paper investigates a novel high-performance strategy for overcoming these problems in a sensorless ac motor drive. In this paper, a variation of the DC link voltage and a direct compensation for dead time and voltage drop are proposed. The variable DC link voltage leads to an improved resolution of the inverter output voltage, especially in the motor's low speed range. The direct compensation for dead time and voltage drop directly calculates the duration of the switching voltage vector without the modification of the reference voltage and needs no additional circuits. In addition, the proposed strategy reduces a current ripple, which deteriorates the accuracy of a monitored current and causes torque ripple and additional loss. Simulation and experimentation have been performed to verify the proposed strategy.