• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.238-242
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• 2004

The paper describes an automatic frequency control current-fed inverter for forging applications. The IGBT in series with diodes as its switching devices in the inverter circuit which is of full-bridge type. The operating frequency is automatically tracked to maintain a small constant leading phase angle when load parameters change. The load voltage is controlled to protect the switches. The output power can be adjusted by varying the input current from phase controlled rectifiers which is a part of current source. The system has been operated at 15-17 kHz. The output power transferred to the load is 1,595 watts. It can heat the steel work pieces with 15 mm diameter and 120 mm long from room temperature to approximately 1100 $^{\circ}C$ within 20 seconds with 0.97 leading power factor on the input side.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.970-973
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• 2003

Abstract An idea to redce the direct-path short circuit current of the CMOS digital integrated circuit is present. The sample circuit model of the CMOS digital circuit is the CMOS current-control digital output driver circuit, which are also suitable for the low voltage supply integrated circuits as the simple digital inverter, are present in this title. The circuit consists of active MOS load as the current control source, which construct from the saturated n-channel and p-channel MOSFET and the general CMOS inverter circuits. The saturated MOSFET bias can control the output current and the frequency response of the circuit. The experimental results show that lower short circuit current control can make the lower frequency response of the circuit.

• Proceedings of the KIEE Conference
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• 2008.11a
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• pp.65-67
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• 2008

A new pulse width modulation method based on predictive current control strategy is proposed to modulate matrix converters. The predictive current controller utilizes a discrete-time model to predict the future values of output currents and generates proper duty-ratios ta minimize the output current errors. The proposed method uses continuous carrier and establishes a predictive current controller to predetermine duty ratio signal for directly generating gating signals an thus is named "predictive current control PWM(PCCPWM)". The modulation algorithm nd the required equations are derived by using average concept over one switching period. Thus it can be easily extended to other matrix converter topologies, especially with neutral connections, such as sing le-phase ad two-phase matrix converters. The feasibility and validity of the proposed strategy are verified by computer simulation and experimental results.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.3
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• pp.185-192
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• 1998

This paper presentsa new currnet control method ofthe six-pulse cycloconverter which is used as a variable speed drive system of a large capacity ac mortor. For a high performance control as a vector control, it is necessary that the output current control ofthe power converter has a good characteristic in transient state. A new proposed current control method is that the output current of a cycloconverter is followed after the current reference directly as fast as possible under any condition. Simultion results for the proposed new current control method are shown and its validity of the proposed method is confired.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.90-94
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• 1998

The parallel inverter is popularly used because of its fault-tolerance capability, high-current outputs at constant voltages and system modularity. The conventional parallel inverter usually employes active and reactive power control or frequency and voltage droop control. However, these approaches have the disadvantages that the response time of parallel inverter control is slow against load and system parameter variation to calculate active, reactive power, frequency and voltage. This paper describes a novel control scheme for power equalization in parallel connected inverter. The proposed scheme has a fast power balance control response, a simplicity of implementation, and inherent peak current limiting capability since it employes a instantaneous current/voltage control with output voltage and current balance and output voltage regulation. A design procedure for the proposed parallel inverter controller is presented. Futhermore, the proposed control scheme is verified through the simulation in various cases such as the system parameter variation, the control parameter variation and the nonlinear load condition.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.79-84
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• 1998

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with low output current ripple is presented. A simple auxiliary circuit added in the secondary provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches, as well as reduces the output current ripple (ideally zero ripple). The auxiliary circuit includes neither lossy components nor additional active switches which are demerits of the previously presented ZVZCS converters. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive for high performance high power (＞1kW) applications. The principle of operation, features and design considerations are illustrated and verified on a 2.5kW, 100KHz IGBT based experimental circuit.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.465-470
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• 2010

The charge pump in a phase-locked loop is a key block in determining reference spurs of the VCO output signal. To reduce reference spurs, the current mismatch in the charge pump must be minimized. This paper presents a dual compensation method to reduce the current mismatch. The proposed charge pump and PLL were realized in a $0.18{\mu}m$ CMOS process. Measured current matching characteristics were achieved with less than 1.4% difference and with the current variation of 3.8% in the pump current over the charge pump output voltage range of 0.35-1.35V at 1.8V. The reference spur of the PLL based on the proposed charge pump was measured to be -71dBc.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.134-141
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• 2022

This study presents a method for reducing current distortion that occurs when a dual-buck inverter generates reactive power. Dual-buck inverters, which are only capable of unity power factor operation, can generate reactive power capabilities by modifying a modulation technique. However, under non-unity power factor conditions, current distortion occurs at zero-crossing points of grid voltage and output current. This distortion is caused by parasitic capacitors, dead-time, and discontinuous conduction mode operation. This study proposes a modified modulation method to alleviate the current distortion at zero-crossing point of the grid voltage. A repetitive controller is applied to reduce this distortion of the output current. A 1 kVA prototype is built and tested. Simulation and experimental results demonstrate the effectiveness of the proposed method.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1672-1682
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• 2017

For grid-connected LCL-filtered inverters, the inverter-side current can be used as the control object with one current sensor for both LCL resonance damping and over-current protection, while the grid-voltage feedforward or harmonic resonant compensator is used for suppressing low-order grid current harmonics. However, it was found that the grid current harmonics were high and often beyond the standard limitations with this control. The limitations of the inverter-side current control in suppressing low-order grid current harmonics are analyzed through inverter output impedance modeling. No matter which compensator is used, the maximum magnitudes of the inverter output impedance at lower frequencies are closely related to the LCL parameters and are decreased by increasing the control delay. Then, to improve the grid current quality without complicating the control or design, this study proposes designing the filter capacitance considering the current harmonic constraint and using a PWM mode with a short control delay. Test results have confirmed the limitation and verified the performance of the improved approaches.

• Journal of Information Technology Applications and Management
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• v.21 no.4_spc
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• pp.381-401
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• 2014

This study proposes the accurate economic effect (employment inducement coefficient, hiring inducement coefficient, index of the sensitivity of dispersion, index of the power of dispersion, and ratio of value added) of Korea software industry by analyzing the inter-industry relation using the modified inter-industry table. Some previous studies related to the inter-industry analysis were reviewed and the key problems were identified. First, in the current inter-industry table publishedby the Bank of Korea, the output of software industry includes not only the output of pure software industry (package software and IT services) but also the output of non-software industry due to the misclassification of the industry. This causes the output to become bigger than the actual output of the software industry. Second, during rewriting the inter-industry table, the output is changing. The inter-industry table is the table in the form of rows and columns, which records the transactions of goods and services among industries which are required to continue the activities of each industry. Accordingly, if only an output of a specific industry is changed, the reliability of the table would be degraded because the table is prepared based on the relations with other industries. This possibly causes the economic effect coefficient to degrade reliability, over or under estimated. This study tries to correct these problems to get the more accurate economic effect of the software industry. First, to get the output of the pure software section only, the data from the Korea Electronics Association(KEA) was used in the inter-industry table. Second, to prevent the difference in the outputs during rewriting the inter-industry table, the difference between the output in the current inter-industry table and the output from KEA data was identified and then it was defined as the non-software section output for the analysis. The following results were obtained: The pure software section's economic effect coefficient was lower than the coefficient of non-software section. It comes from differenceof data to Bank of Korea and KEA. This study hasa signification from accurate economic effect of Korea software industry.