• Title/Summary/Keyword: Neuromorphic Architecture

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Performance Analysis of Speech Recognition Model based on Neuromorphic Architecture of Speech Data Preprocessing Technique (음성 데이터 전처리 기법에 따른 뉴로모픽 아키텍처 기반 음성 인식 모델의 성능 분석)

  • Cho, Jinsung;Kim, Bongjae
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.3
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    • pp.69-74
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    • 2022
  • SNN (Spiking Neural Network) operating in neuromorphic architecture was created by mimicking human neural networks. Neuromorphic computing based on neuromorphic architecture requires relatively lower power than typical deep learning techniques based on GPUs. For this reason, research to support various artificial intelligence models using neuromorphic architecture is actively taking place. This paper conducted a performance analysis of the speech recognition model based on neuromorphic architecture according to the speech data preprocessing technique. As a result of the experiment, it showed up to 84% of speech recognition accuracy performance when preprocessing speech data using the Fourier transform. Therefore, it was confirmed that the speech recognition service based on the neuromorphic architecture can be effectively utilized.

Application Scenario of Integrated Development Environment for Autonomous IoT Applications based on Neuromorphic Architecture (뉴로모픽 아키텍처 기반 자율형 IoT 응용 통합개발환경 응용 시나리오)

  • Park, Jisu;Kim, Seoyeon;Kim, Hoinam;Jeong, Jaehyeok;Kim, Kyeongsoo;Jung, Jinman;Yun, Young-Sun
    • Smart Media Journal
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    • v.11 no.2
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    • pp.63-69
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    • 2022
  • As the use of various IoT devices increases, the importance of IoT platforms is also rising. Recently, artificial intelligence technology is being combined with IoT devices, and research applying a neuromorphic architecture to IoT devices with low power is also increasing. In this paper, an application scenario is proposed based on NA-IDE (Neuromorphic Architecture-based autonomous IoT application integrated development environment) with IoT devices and FPGA devices in a GUI format. The proposed scenario connects a camera module to an IoT device, collects MNIST dataset images online, recognizes the collected images through a neuromorphic board, and displays the recognition results through a device module connected to other IoT devices. If the neuromorphic architecture is applied to many IoT devices and used for various application services, the autonomous IoT application integrated development environment based on the neuromorphic architecture is expected to emerge as a core technology leading the 4th industrial revolution.

NAAL: Software for controlling heterogeneous IoT devices based on neuromorphic architecture abstraction (NAAL: 뉴로모픽 아키텍처 추상화 기반 이기종 IoT 기기 제어용 소프트웨어)

  • Cho, Jinsung;Kim, Bongjae
    • Smart Media Journal
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    • v.11 no.3
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    • pp.18-25
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    • 2022
  • Neuromorphic computing generally shows significantly better power, area, and speed performance than neural network computation using CPU and GPU. These characteristics are suitable for resource-constrained IoT environments where energy consumption is important. However, there is a problem in that it is necessary to modify the source code for environment setting and application operation according to heterogeneous IoT devices that support neuromorphic computing. To solve these problems, NAAL was proposed and implemented in this paper. NAAL provides functions necessary for IoT device control and neuromorphic architecture abstraction and inference model operation in various heterogeneous IoT device environments based on common APIs of NAAL. NAAL has the advantage of enabling additional support for new heterogeneous IoT devices and neuromorphic architectures and computing devices in the future.

Feature Representation Method to Improve Image Classification Performance in FPGA Embedded Boards Based on Neuromorphic Architecture (뉴로모픽 구조 기반 FPGA 임베디드 보드에서 이미지 분류 성능 향상을 위한 특징 표현 방법 연구)

  • Jeong, Jae-Hyeok;Jung, Jinman;Yun, Young-Sun
    • Journal of Software Assessment and Valuation
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    • v.17 no.2
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    • pp.161-172
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    • 2021
  • Neuromorphic architecture is drawing attention as a next-generation computing that supports artificial intelligence technology with low energy. However, FPGA embedded boards based on Neuromorphic architecturehave limited resources due to size and power. In this paper, we compared and evaluated the image reduction method using the interpolation method that rescales the size without considering the feature points and the DCT (Discrete Cosine Transform) method that preserves the feature points as much as possible based on energy. The scaled images were compared and analyzed for accuracy through CNN (Convolutional Neural Networks) in a PC environment and in the Nengo framework of an FPGA embedded board.. As a result of the experiment, DCT based classification showed about 1.9% higher performance than that of interpolation representation in both CNN and FPGA nengo environments. Based on the experimental results, when the DCT method is used in a limited resource environment such as an embedded board, a lot of resources are allocated to the expression of neurons used for classification, and the recognition rate is expected to increase.

Next-Generation Neuromorphic Hardware Technology (차세대 뉴로모픽 하드웨어 기술 동향)

  • Moon, S.E.;Im, J.P.;Kim, J.H.;Lee, J.;Lee, M.Y.;Lee, J.H.;Kang, S.Y.;Hwan, C.S.;Yoo, S.M.;Kim, D.H.;Min, K.S.;Park, B.H.
    • Electronics and Telecommunications Trends
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    • v.33 no.6
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    • pp.58-68
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    • 2018
  • A neuromorphic hardware that mimics biological perceptions and has a path toward human-level artificial intelligence (AI) was developed. In contrast with software-based AI using a conventional Von Neumann computer architecture, neuromorphic hardware-based AI has a power-efficient operation with simultaneous memorization and calculation, which is the operation method of the human brain. For an ideal neuromorphic device similar to the human brain, many technical huddles should be overcome; for example, new materials and structures for the synapses and neurons, an ultra-high density integration process, and neuromorphic modeling should be developed, and a better biological understanding of learning, memory, and cognition of the brain should be achieved. In this paper, studies attempting to overcome the limitations of next-generation neuromorphic hardware technologies are reviewed.

Trend of AI Neuromorphic Semiconductor Technology (인공지능 뉴로모픽 반도체 기술 동향)

  • Oh, K.I.;Kim, S.E.;Bae, Y.H.;Park, K.H.;Kwon, Y.S.
    • Electronics and Telecommunications Trends
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    • v.35 no.3
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    • pp.76-84
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    • 2020
  • Neuromorphic hardware refers to brain-inspired computers or components that model an artificial neural network comprising densely connected parallel neurons and synapses. The major element in the widespread deployment of neural networks in embedded devices are efficient architecture for neuromorphic hardware with regard to performance, power consumption, and chip area. Spiking neural networks (SiNNs) are brain-inspired in which the communication among neurons is modeled in the form of spikes. Owing to brainlike operating modes, SNNs can be power efficient. However, issues still exist with research and actual application of SNNs. In this issue, we focus on the technology development cases and market trends of two typical tracks, which are listed above, from the point of view of artificial intelligence neuromorphic circuits and subsequently describe their future development prospects.

New Memristor-Based Crossbar Array Architecture with 50-% Area Reduction and 48-% Power Saving for Matrix-Vector Multiplication of Analog Neuromorphic Computing

  • Truong, Son Ngoc;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.3
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    • pp.356-363
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    • 2014
  • In this paper, we propose a new memristor-based crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption.

Trends in Neuromorphic Photonics Technology (뉴로모픽 포토닉스 기술 동향)

  • Kwon, Y.H.;Kim, K.S.;Baek, Y.S.
    • Electronics and Telecommunications Trends
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    • v.35 no.4
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    • pp.34-41
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    • 2020
  • The existing Von Neumann architecture places limits to data processing in AI, a booming technology. To address this issue, research is being conducted on computing architectures and artificial neural networks that simulate neurons and synapses, which are the hardware of the human brain. With high-speed, high-throughput data communication infrastructures, photonic solutions today are a mature industrial reality. In particular, due to the recent outstanding achievements of artificial neural networks, there is considerable interest in improving their speed and energy efficiency by exploiting photonic-based neuromorphic hardware instead of electronic-based hardware. This paper covers recent photonic neuromorphic studies and a classification of existing solutions (categorized into multilayer perceptrons, convolutional neural networks, spiking neural networks, and reservoir computing).

Development of a Simulator for RBF-Based Networks on Neuromorphic Chips (뉴로모픽 칩에서 운영되는 RBF 기반 네트워크 학습을 위한 시뮬레이터 개발)

  • Lee, Yeowool;Seo, Keyongeun;Choi, Daewoong;Ko, Jaejin;Lee, Sangyub;Lee, Jaekyu;Cho, Heyonjoong
    • KIPS Transactions on Computer and Communication Systems
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    • v.8 no.11
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    • pp.251-262
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    • 2019
  • In this paper, we propose a simulator that provides various algorithms of RBF networks on neuromorphic chips. To develop algorithms based on neuromorphic chips, the disadvantages of using simulators are that it is difficult to test various types of algorithms, although time is fast. This proposed simulator can simulate four times more types of network architecture than existing simulators, and it provides an additional a two-layer structure algorithm in particular, unlike RBF networks provided by existing simulators. This two-layer architecture algorithm is configured to be utilized for multiple input data and compared to the existing RBF for performance analysis and validation of utilization. The analysis showed that the two-layer structure algorithm was more accurate than the existing RBF networks.