• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.76-78
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• 2003

We have designed and tested an RSFQ (Rapid Single Flux Quantum) NDRO (Non Destructive Read Out) circuit for the development of a high speed superconducting ALU (Arithmetic Logic Unit). When designing the NDRO circuit, we used Julia, XIC and Lmeter for the circuit simulations and layouts. We obtained the simulation margins of larger than $\pm$25％. For the tests of NDRO operations, we attached the three DC/SFQ circuits and two SFQ/DC circuits to the NDRO circuit. In tests, we used an input frequency of 1 KHz to generate SFQ Pulses from DC/SFQ circuit. We measured the operation bias margin of NDRO to be $\pm$15％. The circuit was measured at the liquid helium temperature.

• Progress in Superconductivity
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• v.5 no.1
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• pp.21-25
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• 2003

We have designed and simulated an 1-bit ALU (Arithmetic Logic Unit) by using a half adder. An ALU is the part of a computer processor that carries out arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We constructed an 1-bit ALU by using only one half adder and three control switches. We designed the control switches in two ways, dc switch and NDRO (Non Destructive Read Out) switch. We used dc switches because they were simple to use. NDRO pulse switches were used because they can be easily controlled by control signals of SET and RESET and show fast response time. The simulation results showed that designed circuits operate correctly and the circuit minimum margins were ＋/-27%. In this work, we used simulation tools of XIC and WRSPICE. The circuit layouts were also performed. The circuits are being fabricated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.3
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• pp.200-205
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• 2000

This paper describes the structure modeling and operation characteristics of MFMIS(metal-ferroelectric-metal-insulator-semiconductor) device using the Tsuprem4 which is a semiconductor device tool by Avanti. MFMIS device is being studied for nonvolatile memory application at various semiconductor laboratory but it is difficult to fabricate and analyze MFMIS devices using the semiconductor simulation tool: Tsuprem4, medici and etc. So the new library and new materials parameters for adjusting ferroelectric material and platinum electrodes in the tools are studied. In this paper structural model and operation characteristics of MFMIS devices are measured, which can be easily adopted to analysis of MFMIS device for nonvolatile memory device application.

• Korean Journal of Materials Research
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• v.11 no.5
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• pp.367-371
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• 2001

In this paper, theS $r_2$(T $a_{1-x}$ , N $b_{x}$)$_2$ $O_{7}$(STNO) films among ferroelectric materials having a low dielectric constant for metal-ferroelectric-semiconductor field effect transistor(MFS-FET) were discussed. The STNO thin films were deposited on p-type Si(100) at room temperature by co-sputtering with S $r_2$N $b_2$ $O_{7(SNO)}$ ceramic target and T $a_2$ $O_{5}$ ceramic target. The composition of STNO thin films was varied by adjusting the power ratios of SNO target and T $a_2$ $O_{5}$ target. The STNO films were annealed at 8$50^{\circ}C$, 90$0^{\circ}C$ and 9$50^{\circ}C$ temperature in oxygen ambient for 1 hour. The value of x has significantly influenced the structure and electrical properties of the STNO films. In the case of x= 0.4, the crystallinity of the STNO films annealed at 9$50^{\circ}C$ was observed well and the memory windows of the Pt/STNO/Si structure were 0.5-8.3 V at applied voltage of 3-9 V and leakage current density was 7.9$\times$10$_{08}$A/$\textrm{cm}^2$ at applied voltage of -5V.of -5V.V.V.