• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.145-150
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• 1998

8$\times$8 bit scaled SONOSFET NAND type flash EEPROM that shows better characteristics on cell density and endurance than NOR type have been designed and its electrical characteristics are verified with computer aided simulation. For the simulation, the spice model parameter was extracted from the sealed down SONOSFET that was fabricated by $1.5mutextrm{m}$ topological design rule. To improve the endurance of the device, the EEPROM design to have modified Fowler-Nordheim tunneling through the whole channel area in Write/Erase operation. As a result, it operates Write/Erase operation at low current, and has been proven Its good endurance. The NAND type flash EEPROM, which has upper limit of V$_{th}$, has the upper limit of V$_{th}$ as 4.5V. It is better than that of floating gate as 4V. And a EEPROM using the SONOSFET without scaling (65$\AA$-l65$\AA$-35$\AA$), was also designed and its characteristics have been compared. It has more possibliity of error from the V$_{th}$ upper limit as 4V, and takes more time for Read operation due to low current. As a consequence, it is proven that scaled down SONOSFET is more pertinent than existing floating gate or SONOSFET without scaling for the NAND type flash EEPROM.EPROM.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.1-7
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• 2000

The SNOSFET memory devices with ultrathin ONO(tunnel oxide-nitride-blocking oxide) gate dielectric were fabricated using n-well CMOS process and investigated its characteristics. The thicknesses of tunnel oxide, nitride and blocking oxide were $23{\AA},\; 53{\AA}\; and\; 33{\AA}$, respectively. Auger analysis shows that the ONO layer is made up of $SiO_2(upper layer of blocking oxide)/O-rich\; SiO_x\N\_y$. It clearly shows that the converting layer with $SiO_x\N\_y(lower layer of blocking oxide)/N-rich SiO_x\N\_y(nitride)/O-rich SiO_x\N\_y(tunnel oxide)$. It clearly shows that the converting layer with $SiO_x\N\_y$ phase exists near the interface between the blocking oxide and nitride. The programming condition of +8 V, 20 ms, -8 V, 50 ms is determined and data retention over 10 years is obtained. Under the condition of 8 V programming, it was confirmed that the modified Fowler-Nordheim tunneling id dominant charge transport mechanism. The programmed threshold voltage is distributed less than 0.1 V so that the reading error of memory stated can be minimized. An $8\times8$ NAND type flash EEPROM with SONOSFET memory cell was designed and simulated with the extracted SPICE parameters. The sufficient read cell current was obtained and the upper limit of $V_{TH}$ for write state was over 2V.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.3
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• pp.47-57
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• 2008

Recently, energy-efficient NAND Flash memory of large volume is favored as next-generation storage for sensor nodes. So far, most sensor node file systems are based on NOR flash and few file systems are applicable to large NAND flash memory. Although it is required to develop new file systems taking account of the features of NAND flash memory, it is difficult to develop them mainly due to the limit of SRAM memory on sensor nodes. Sensor nodes support SRAM of $4{\sim}10$ KBytes only. In this paper, we designed and implemented a novel file system to support data-centric applications. To do this, we added EEPROM of 1 KBytes to store persistent file description data efficiently and devised a simple wear-leveling method. This reduces the number of page updates, resulting in reduction in energy use and increase in lifetime of sensor nodes.

• Proceedings of the Korean Information Science Society Conference
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• 2007.10c
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• pp.140-145
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• 2007

최근에 에너지의 효율성이 좋고 대용량화가 쉬운 낸드 플래시가 센서 노드를 위한 차세대 저장소로 각광을 받고 있다. 현재 대부분의 센서 노드용 파일 시스템은 노어 플래시 기반으로 개발되어 있으며 낸드 플래시에 적용할 수 있는 파일 시스템은 거의 존재하지 않는다. 대용량 낸드 플래시 메모리의 특성을 고려한 새로운 파월 시스템의 구축이 요구되지만, 센서 노드는 오직 4-10 KByte의 매우 작은 크기의 메모리를 지원하므로 효율성이 뛰어난 파일 시스템을 구축하는 것은 매우 어렵다. 본 논문은 1 Kbit의 매우 작은 크기의 EEPROM을 부착하여 이러한 메모리 한계를 극복하였으며 자원의 효율성, 대용량의 지원 및 신뢰성을 고려한 새로운 파일 시스템의 설계에 대하여 논한다. 위치를 유지해야 하는 데이터의 위치저장을 위하여 EEPROM을 사용하며 장기간 데이터를 수집할 때 페이지의 갱신을 최소화 할 수 있는 로그 리스트 기반의 페이지 처리 방법에 대해 제안한다. 이는 획기적으로 페이지 갱신 횟수를 줄임으로써 에너지를 절약하고 보다 긴 시간동안 데이터의 수집을 용이하게 만들며 센서 노드의 수명을 증가시킨다.