• Title/Summary/Keyword: N-current

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Contact Area-Dependent Electron Transport in Au/n-type Ge Schottky Junction

  • Kim, Hogyoung;Lee, Da Hye;Myung, Hye Seon
    • Korean Journal of Materials Research
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    • v.26 no.8
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    • pp.412-416
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    • 2016
  • The electrical properties of Au/n-type Ge Schottky contacts with different contact areas were investigated using current-voltage (I-V) measurements. Analyses of the reverse bias current characteristics showed that the Poole-Frenkel effect became strong with decreasing contact area. The contribution of the perimeter current density to the total current density was found to increase with increasing reverse bias voltage. Fitting of the forward bias I-V characteristics by considering various transport models revealed that the tunneling current is dominant in the low forward bias region. The contributions of both the thermionic emission (TE) and the generation-recombination (GR) currents to the total current were similar regardless of the contact area, indicating that these currents mainly flow through the bulk region. In contrast, the contribution of the tunneling current to the total current increased with decreasing contact area. The largest $E_{00}$ value (related to tunneling probability) for the smallest contact area was associated with higher tunneling effect.

Electrical Leakage Levels Estimated from Luminescence and Photovoltaic Properties under Photoexcitation for GaN-based Light-emitting Diodes

  • Kim, Jongseok;Kim, HyungTae;Kim, Seungtaek;Choi, Won-Jin;Jung, Hyundon
    • Current Optics and Photonics
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    • v.3 no.6
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    • pp.516-521
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    • 2019
  • The electrical leakage levels of GaN-based light-emitting diodes (LEDs) containing leakage paths are estimated using photoluminescence (PL) and photovoltaic properties under photoexcitation conditions. The PL intensity and open-circuit voltage (VOC) decrease because of carrier leakages depending on photoexcitation conditions when compared with reference values for typical LED chips without leakage paths. Changes of photovoltage-photocurrent characteristics and PL intensity due to carrier leakage are employed to assess the leakage current levels of LEDs with leakage paths. The current corresponding to the reduced VOC of an LED with leakage from the photovoltaic curve of a reference LED without leakage is matched with the leakage current calculated using the PL intensity reduction ratio and short-circuit current of the LED with leakage. The current needed to increase the voltage for an LED with a leakage under photoexcitation from VOC of the LED up to VOC of a reference LED without a leakage is identical to the additional current needed for optical turn-on of the LED with a leakage. The leakage current level estimated using the PL and photovoltaic properties under photoexcitation is consistent with the leakage level measured from the voltage-current characteristic obtained under current injection conditions.

Design of Multiple Valued Logic Circuits with ROM Type using Current Mode CMOS (전류방식 CMOS에 의한 ROM 형의 다치 논리 회로 설계)

  • 최재석;성현경
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.4
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    • pp.55-61
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    • 1994
  • The multiple valued logic(MVL) circuit with ROM type using current mode CMOS is presented in this paper. This circuit is composed of the multiple valued-to-binary(MV/B) decoder and the selection circuit. The MV/B decoder decodes the single input multiple valued signal to N binary signal, and the selection circuits is composed N$\times$N array of the selecion cells with ROM types. The selection cell is realized with the current mirror circuits and the inhibit circuits. The presented circuit is suitable for designing the circuit of MVL functions with independent variables, and reduces the number of selection cells for designing the circuit of symmetric MVL functions as many as {($N^2$-N)/2}+N. This circuit possess features of simplicity. expansibility for array and regularity, modularity for the wire routing. Also, it is suitable for VLSI implementation.

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An IGBT structure with segmented $N^{+}$ buffer layer for latch-up suppression (래치업 억제를 위한 세그멘트 $N^{+}$ 버퍼층을 갖는 IGBT 구조)

  • Kim, Doo-Young;Lee, Byeong-Hoon;Park, Yearn-Ik
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.44 no.2
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    • pp.222-227
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    • 1995
  • A new IGBT structure, which may suppress latch-up phenomena considerably, is proposed and verified by MEDICI simulation. The proposed structure employing the segmented $n^{+}$ buffer layer increases latch-up current capability due to suppression of the current flowing through the resistance of $p^{-}$ well, $R_{p}$, which is the main cause of latch-up phenomena without degradation of forward characteristics. The length of the $n^{+}$ buffer layer is investigated by considering the trade-off between the latch-up current capability and the forward voltage drop. The segmented $N^{+}$ buffer layer results in better latch-up immunity in comparison with the uniform buffer layer.

Analysis of Generalized n-winding Coupled Inductor in dc-dc Converters

  • Kang, Taewon;Suh, Yongsug
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.88-89
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    • 2017
  • This paper investigates the design of multi-winding coupled inductor for minimum inductor current ripple in rapid traction battery charger systems. Based on the general circuit model of multi-winding coupled inductor together with the operating principles of dc-dc converter, the relationship between the ripple size of inductor current and the coupling factor is derived under the different duty ratio. The optimal coupling factor which corresponds to a minimum inductor ripple current becomes -(1/n-1), i.e. a complete inverse coupling without leakage inductance, as the steady-state duty ratio operating point approaches 1/n, 2/n, … or (n1)/n. In an opposite manner, the optimal coupling factor value of zero, i.e. zero mutual inductance, is required when the steady-state duty ratio operating point approaches either zero or one.

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Characterization of Reverse Leakage Current Mechanism of Shallow Junction and Extraction of Silicidation Induced Schottky Contact Area for 0.15 ${\mu}{\textrm}{m}$ CMOS Technology Utilizing Cobalt Silicide (코발트 실리사이드 접합을 사용하는 0.15${\mu}{\textrm}{m}$ CMOS Technology에서 얕은 접합에서의 누설 전류 특성 분석과 실리사이드에 의해 발생된 Schottky Contact 면적의 유도)

  • 강근구;장명준;이원창;이희덕
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.10
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    • pp.25-34
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    • 2002
  • In this paper, silicidation induced Schottky contact area was obtained using the current voltage(I-V) characteristics of shallow cobalt silicided p+-n and n+-p junctions. In reverse bias region, Poole-Frenkel barrier lowering influenced predominantly the reverse leakage current, masking thereby the effect of Schottky contact formation. However, Schottky contact was conclusively shown to be the root cause of the modified I-V behavior of n+-p junction in the forward bias region. The increase of leakage current in silicided n+-p diodes is consistent with the formation of Schottky contact via cobalt slicide penetrating into the p-substrate or near to the junction area and generating trap sites. The increase of reverse leakage current is proven to be attributed to the penetration of silicide into depletion region in case of the perimeter intensive n+-p junction. In case of the area intensive n+-p junction, the silicide penetrated near to the depletion region. There is no formation of Schottky contact in case of the p+-n junction where no increase in the leakage current is monitored. The Schottky contact amounting to less than 0.01% of the total junction was extracted by simultaneous characterization of forward and reverse characteristics of silicided n+-p diode.

Improvement of the Light Emission Efficiency on Nonpolar a-plane GaN LEDs with SiO2 Current Blocking Layer (무분극 a-plane 질화물계 발광다이오드에서 SiO2 전류 제한 층을 통한 발광 효율 증가)

  • Hwang, Seong Joo;Kwak, Joon Seop
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.3
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    • pp.175-179
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    • 2017
  • In this study, we investigate the $SiO_2$ current blocking layer (CBL) to improve light output power efficiency in nonpolar a-plane (11-20) GaN LEDs on a r-plane sapphire substrate. The $SiO_2$ CBL was produced under the p-pad layer using plasma enhanced chemical vapor deposition (PECVD). The results show that nonpolar GaN LED light output power with the $SiO_2$ CBL is considerably enhanced compared without the $SiO_2$ CBL. This can be attributed to reduced light absorption at the p-pad due to current blocking to the active layer by the $SiO_2$ CBL.

The Electrical Properties of Single-silicon TFT Structure with Symmetric Dual-Gate for kink effect suppression

  • Lee, Deok-Jin;Kang, Ey-Goo
    • Journal of the Korea Computer Industry Society
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    • v.6 no.5
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    • pp.783-790
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    • 2005
  • In this paper, we have simulated a Symmetric Dual-gate Single-Si TFT which has three split floating n+ zones. This structure reduces the kink-effect drastically and improves the on-current. Due to the separated floating n+ zones, the transistor channel region is split into four zones with different lengths defined by a floating n+ region, This structure allows an effective reduction of the kink-effect depending on the length of two sub-channels. The on-current of the proposed dual-gate structure is 0.9mA while that of the conventional dual-gate structure is 0.5mA at a 12V drain voltage and a 7V gate voltage. This result shows a 80% enhancement in on-current. Moreover we observed the reduction of electric field in the channel region compared to conventional single-gate TFT and the reduction of the output conductance in the saturation region. In addition, we also confirmed the reduction of hole concentration in the channel region so that the kink-effect reduces effectively.

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Electrical Characteristics of Ti Self-Aligned Silicide Contact (Ti Self-Aligned Silicide를 이용한 Contact에서의 전기적 특성)

  • 이철진;허윤종;성영권
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.2
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    • pp.170-177
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    • 1992
  • Contact resistance and contact leakage current of the Al/TiSiS12T/Si system are investigated for NS0+T and PS0+T junctions. SALICIDE (Self Aligned Silicide) process was used to make the Al/TiSiS12T/Si system. Titanium disilicide is one of the most common silicides because of its thermal stability, ability to form selective formation and low resistivity. In this paper, RTA temperature effect and Junction implant dose effect were evaluated to characterize contact resistance and contact leakage current. The TiSiS12T contact resistance to NS0+T silicon is lower than that to PS0+T silicon, and TiSiS12T of contact leakage current to NS0+T silicon is lower than that to PS0+T silicon. Contact resistance and contact leakage current of the Al/TiSiS12T/Si system by this method were possible for VLSI application.

Temperature-dependent current-voltage characteristics of Organic Light-Emitting Diodes (OLEDs) (유기 발광 소자의 온도에 따른 전압-전류 특성)

  • 이호식;정택균;김상걸;정동회;장경욱;이원재;김태완;이준웅;강도열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.1088-1091
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    • 2001
  • Temperature-dependent current-voltage characteristics of Organic Light-Emitting Diodes(OLEDs) were studied. The OLEDs were based on the molecular compounds, N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1, 1'-diphenyl-4, 4'-diamine (TPD) as a hole transport and trim(8-hydroxyquinoline) alulninum(Alq$_3$) as an electron transport and emissive material. The current-voltage characteristics were measured in the temperature range of 10[K] and 300[K]. A conduction mechanism in OLEDs was interpreted in terms of tunneling and trap-filled limited current.

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