• Title/Summary/Keyword: Multiplication Function

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A small-area implementation of public-key cryptographic processor for 224-bit elliptic curves over prime field (224-비트 소수체 타원곡선을 지원하는 공개키 암호 프로세서의 저면적 구현)

  • Park, Byung-Gwan;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.6
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    • pp.1083-1091
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    • 2017
  • This paper describes a design of cryptographic processor supporting 224-bit elliptic curves over prime field defined by NIST. Scalar point multiplication that is a core arithmetic function in elliptic curve cryptography(ECC) was implemented by adopting the modified Montgomery ladder algorithm. In order to eliminate division operations that have high computational complexity, projective coordinate was used to implement point addition and point doubling operations, which uses addition, subtraction, multiplication and squaring operations over GF(p). The final result of the scalar point multiplication is converted to affine coordinate and the inverse operation is implemented using Fermat's little theorem. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 2.7-Kbit RAM and 27,739 gate equivalents (GEs), and the estimated maximum clock frequency is 71 MHz. One scalar point multiplication takes 1,326,985 clock cycles resulting in the computation time of 18.7 msec at the maximum clock frequency.

Hybrid Full-field Stress Analysis around a Circular Hole in a Tensile Loaded Plate using Conformal Mapping and Photoelastic Experiment (등각사상 맵핑 및 광탄성 실험법에 의한 원형구명 주위의 하이브리드 응력장 해석)

  • Baek, Tae-Hyun;Kim, Myung-Soo;Rhee, Ju-Hun
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.23 no.6 s.165
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    • pp.988-1000
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    • 1999
  • An experimental study is presented for the effect of number of terms of a pewee series type stress function on stress analysis around a hole in tensile loaded plate. The hybrid method coupling photoelastsic data inputs and complex variable formulations involving conformal mappings and analytical continuity is used to calculate tangential stress on the boundary of the hole in uniaxially loaded, finite width tensile plate. In order to measure isochromatic data accurately, actual photoelastic fringe patterns are two times multiplied and sharpened by digital image processing. For qualitative comparison, actual fringes are compared with calculated ones. For quantitative comparison, percentage errors and standard deviations with respect to percentage errors are caculated for all measured points by changing the number of terms of stress function. The experimental results indicate that stress concentration factors analyzed by the hybrid method are accurate within three percent compared with ones obtained by theoretical and finite element analysis.

Influence of the Photosynthesis of Synechococcus sp. on the Development of its Cyanophage (Synechococcus sp.의 광합성이 Cyanophage 증식에 미치는 영향)

  • Kim, Min;Choi, Yong-Keel
    • Korean Journal of Microbiology
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    • v.32 no.1
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    • pp.65-69
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    • 1994
  • Light appears to be needed in the early and late function of the cyanophage of Synechococcus sp. and dark treatment during the first 2 hr of the replication cycle increased the virus yield to 200%. The burst size of the cyanophage multiplied in Synechococcus sp. in dark was 11% of that of control. The viral multiplication was reduced 2% in the presence of photosynthetic inhibitor, DCMU of $10^{-6}$ M, and nearly blocked in $10^{-4}$ M CCCP. These data suggested that the photosynthetic dependence of the cyanophage is greater than those of LPP-1 and AS-1, and smaller than SM-1.

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A Construction of the Linear Digital Switching Function over Finite Fields (유한체상에서의 선형디지털스위칭함수 구성)

  • Park, Chun-Myoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.12
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    • pp.2201-2206
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    • 2008
  • This paper presents a method of constructing the Linear Digital Switching Function(LDSF) over finite fields. The proposed method is as following. First of all, we extract the input/output relationship of linear characteristics for the given digital switching functions, Next, we convert the input/output relationship to Directed Cyclic Graph(DCG) using basic gates adder and coefficient multiplier that are defined by mathematical properties in finite fields. Also, we propose the new factorization method for matrix characteristics equation that represent the relationship of the input/output characteristics. The proposed method have properties of generalization and regularity. Also, the proposed method is possible to any prime number multiplication expression.

An IMADF Algorithm for Adaptive Noise Cancelation of Biomedical Signal (생체신호의 적응잡음제거를 위한 비적적응필터 알고리즘)

  • Yoon, Dal-Hwan;Lin, Chi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.59-67
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    • 2009
  • In this paper, we have proposed the structure of the IMADF(improved modified multiplication-free adaptive filter) to cancel the adaptive noise in biomedical signals. The IMADF structure use the one-step predicted filter in the multiplication-free adaptive digital filter(MADF) structure using the DPCM and Sign algorithm. And then we use the heart phantom model based on the magnetocardiographic (MCG) to test the biomedical signals and analyze the signal of it. Their functions of the heart phantom occur from the multidipole current source. This can play role the same in the real function of the human heart to study it. In the experimental results, the IMADF algorithm has reduced the computational complexity by use of only the addition operation without a multiplier. Also, under the condition of identical stationary-state error, it could obtain the stabled convergence characteristics that the IMADF algorithm is almost same as the sign algorithm, but is better than the MADF algorithm. Here, this algorithm has effective characteristics when the correlation of the input signal is highly.

An Implementation and Verification of Performance Monitor for Parallel Signal Processing System (병렬신호처리시스템을 위한 성능 모니터의 구현 및 검증)

  • Lee Won-Joo;Kim Hyo-Nam
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.5 s.37
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    • pp.313-322
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    • 2005
  • In this paper, we implement and verify performance monitor for parallel signal processing system, using DSP Starter Kit(DSK) of which the basic Processor is TMS302C6711 chip. The key ideas of this performance monitor is, using Real Time Data Exchange(RTDX) for the Purpose of real-time data transfer and function of DSP/BIOS, the ability to measure the Performance measure like DSP workload, memory usage, and bridge traffic. In the simulation, FFT, 2D FFT, Matrix Multiplication, and Fir Filter, which are widely used DSP algorithms, have been employed. Using performance monitor and Code Composer Studio from Texas Instrument(Tl) , the result has been recorded according to different frequencies, data sizes, and buffer sizes for a single wave file. The accuracy of our performance monitor has been verified by comparing those recorded results.

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Design and Implementation of the Digital Neuron Processor for the real time object recognition in the making Automatic system (생산자동화 시스템에서 실시간 물체인식을 위한 디지털 뉴런프로세서의 설계 및 구현)

  • Hong, Bong-Wha;Joo, Hae-Jong
    • Journal of the Korea Society of Computer and Information
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    • v.12 no.3
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    • pp.37-50
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    • 2007
  • In this paper, we designed and implementation of the high speed neuron processor for real time object recognition in the making automatic system. and we designed of the PE(Processing Element) used residue number system without carry propagation for the high speed operation. Consisting of MAC(Multiplication and Accumulation) operator using residue number system and sigmoid function operator unit using MAC(Mixed Radix conversion) is designed. The designed circuits are descript by C language and VHDL(Very High Speed Integrated Circuit Hardware Description Language) and synthesized by compass tools and finally, the designed processor is fabricated in $0.8{\mu}m$ CMOS process. we designed of MAC operation unit and sigmoid proceeding unit are proved that it could run time 0.6nsec on the simulation and improved to the speed of the three times and decreased to hardware size about 50%, each order. The designed neuron processor can be implemented of the object recognition in making automatic system with desired real time processing.

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New N-dimensional Basis Functions for Modeling Surface Reflectance (표면반사율 모델링을 위한 새로운 N차원 기저함수)

  • Kwon, Oh-Seol
    • Journal of Broadcast Engineering
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    • v.17 no.1
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    • pp.195-198
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    • 2012
  • The N basis functions are typically chosen so that Surface reflectance functions(SRFs) and spectral power distributions (SPDs) can be accurately reconstructed from their N-dimensional vector codes. Typical rendering applications assume that the resulting mapping is an isomorphism where vector operations of addition, scalar multiplication, component-wise multiplication on the N-vectors can be used to model physical operations such as superposition of lights, light-surface interactions and inter-reflection. The vector operations do not mirror the physical. However, if the choice of basis functions is restricted to characteristic functions then the resulting map between SPDs/SRFs and N-vectors is anisomorphism that preserves the physical operations needed in rendering. This paper will show how to select optimal characteristic function bases of any dimension N (number of basis functions) and also evaluate how accurately a large set of Munsell color chips can approximated as basis functions of dimension N.

Basis Function Truncation Effect of the Gabor Cosine and Sine Transform (Gabor 코사인과 사인 변환의 기저함수 절단 효과)

  • Lee, Juck-Sik
    • The KIPS Transactions:PartB
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    • v.11B no.3
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    • pp.303-308
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    • 2004
  • The Gabor cosine and sine transform can be applied to image and video compression algorithm by representing image frequency components locally The computational complexity of forward and inverse matrix transforms used in the compression and decompression requires O($N^3$)operations. In this paper, the length of basis functions is truncated to produce a sparse basis matrix, and the computational burden of transforms reduces to deal with image compression and reconstruction in a real-time processing. As the length of basis functions is decreased, the truncation effects to the energy of basis functions are examined and the change in various Qualify measures is evaluated. Experiment results show that 11 times fewer multiplication/addition operations are achieved with less than 1% performance change.

Image Encryption using LFSR and CAT (LFSR과 CAT을 이용한 영상 암호화)

  • Nam, Tae-Hee;Kim, Seok-Tae;Cho, Sung-Jin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.164-167
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    • 2009
  • In this paper, we propose the image encryption using LFSR(Linear Feedback Shift Register) and 2D CAT(Two-Dimensional Cellular Automata Transform). First, a LFSR is used to create a PN(pseudo noise) sequence, which is identical to the size of the original image. Then, the created sequence goes through a XOR operation with the original image to convert the original image. Next, the gateway value is set to produce a 2D CAT basis function. Using the created basis function, multiplication is done with the converted original image to process 2D CAT image encipherment. Lastly, the stability analysis verifies that the proposed method holds a high encryption quality status.

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