• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권9호
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• pp.459-466
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• 2001

This paper proposes a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber unit. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with conventional RCD/RLD snubber for multileve1 inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low loss snubber. In this paper, the proposed snubber is applied to three-level flying capacitor inverter and this feature is demonstrated by computer simulation and experimental result.

• Journal of Power Electronics
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• 제15권1호
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• pp.96-105
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• 2015

In recent years, the multilevel converters have been given more attention due to their modularity, reliability, failure management and multi stepped output waveform with less total harmonic distortion. This paper presents a novel symmetric multilevel inverter topology with reduced switching components to generate a high quality stepped sinusoidal voltage waveform. The series and parallel combinations of switches in the proposed topology reduce the total number of conducting switches in each level of output voltages. In addition, a comparison between the proposed topology with another topology from the literature is presented. To verify the proposed topology, the computer based simulation model is developed using MATLAB/Simulink and experimentally with a prototype model results are then compared.

• Journal of Electrical Engineering and Technology
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• 제12권6호
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• pp.2278-2288
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• 2017

Multilevel converter topologies are widely used in many applications. The cascaded H-bridge multilevel inverter (CHBMI), which is one of many multilevel converter topologies, has been introduced as a useful topology in high and medium power. However, it has a drawback to require a lot of switches. Therefore, the reliability of CHBMI is important factor for analyzing the performance. This paper presents a simple switch fault diagnosis method for single-phase CHBMI. There are two types of switch faults: open-fault and short-fault. In the open-fault, the body diode of faulty switch provides a freewheeling current path. However, when the short-fault occurs, the distortion of output current is different from that of the open-fault because it has an unavailable freewheeling current flow path due to a disconnection of fuse. The fault diagnosis method is based on the zero current time analysis according to zero-voltage switching states. Using the proposed method, it is possible to detect the location of faulty switch accurately. The PSIM simulation and experimental results show the effectiveness of proposed switch fault diagnosis method.

• Journal of Power Electronics
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• 제17권5호
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• pp.1173-1185
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• 2017

In this paper, a new single phase multilevel inverter topology with a single DC source is presented. The proposed topology is developed based on the concepts of the L-Z source inverter and the switched capacitor multilevel inverter. The input voltage to the proposed inverter is boosted by two steps: the first step by an impedance network and the second step by switched capacitor units. Compared to other existing topologies, the presented topology can produce a higher boosted multilevel output voltage while using a smaller number of components. In addition, it provides more flexibility to control boosting factor, size, cost and complexity of the inverter. The proposed inverter possesses all the advantages of the L-Z source inverter and the switched capacitor multilevel inverter like controlling the start-up inrush current and capacitor voltage balancing using a simple switching strategy. The operating principle and general expression for the different parameters of the proposed topology are presented in detail. A phase disposition pulse width modulation strategy has been developed to switch the inverter. The effectiveness of the topology is verified by extensive simulation and experimental studies on a 7-level inverter structure.

• Journal of Power Electronics
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• 제16권6호
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• pp.2099-2108
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• 2016

The cascaded multilevel converter is widely adopted to medium/high voltage and high power electronic applications due to the small harmonic components of the output voltage and the facilitation of modularity. In this paper, the operation principle of a T-type H-bridge topology is investigated in detail, and a carrier phase shifted pulse width modulation (CPS-PWM) based control method is proposed for this topology. Taking a virtual five-level waveform achieved by a unipolar double frequency CPS-PWM as the output object, PWM signals of the T-type H-bridge can be obtained by reverse derivation according to its switching modes. In addition, a control method for the T-type H-bridge based cascaded multilevel converter is introduced. Then a single-phase T-type H-bridge cascaded multilevel static var generator (SVG) prototype is built, and a repetitive controller based compound current control strategy is designed with the DC-link voltage balancing control scheme analyzed. Finally, simulation and experimental results validate the correctness and feasibility of the proposed modulation method and control strategy for T-type H-bridge based cascaded multilevel converters.

• Journal of Power Electronics
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• 제17권1호
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• pp.96-105
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• 2017

In this paper, a hybrid modular multilevel converter (MMC) topology with an improved nearest level modulation method is proposed for medium-voltage high-power applications. The arm of the proposed topology contains N series connected half-bridge submodules (HBSMs), one full-bridge submodule (FBSM) and an inductor. By exploiting the FBSM, half-level voltages are obtained in the arm voltages. Therefore, an output voltage with a 2N+1 level number can be generated. Moreover, the total level number of the inserted submodules (SMs) is a constant. Thus, there is no pulse voltage across the arm inductors, and the SM capacitor voltage is rated. With the proposed voltage balancing method, the capacitor voltage of the HBSM is twice the voltage of the FBSM, and each IGBT of the FBSM has a relatively low switching frequency and an equalized conduction loss. The capacitor voltage balancing methods of the two kinds of SMs are implemented independently. As a result, the switching frequency of the HBSM is not increased compared to the conventional MMC. In addition, according to a theoretical calculation of the total harmonic distortion of the electromotive force (EMF), the voltage quality with the presented method can be significantly enhanced when the SM number is relatively small. Simulation and experimental results obtained with a MMC-based inverter verify the validity of the developed method.

• Journal of Power Electronics
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• 제13권1호
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• pp.59-69
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• 2013

An alternative technique to control multilevel inverters with vector approximations has been presented. The innovative control method utilizes specially designed two-dimensional hysteresis comparators to simplify the implementation and improve the resultant waveform. The multistage inverter designed with maximum number of levels is operated in such a way to approximate the reference voltage vector by exploiting the large number of multilevel inverter vectors. A three-stage inverter with the main high voltage stage made of three phase, six-switch and singly-fed inverter is considered for application to the proposed design. The proposed control concept is to maintain a higher voltage stage state as long as it can lead to a target vector. High and medium voltage stages controllers are based on surface hysteresis comparators to hold the switching state or to perform the necessary change to achieve its reference voltage with minimal switching losses. The low voltage stage controller is designed to approximate the target reference voltage to the nearest inverter vector using the nearest integer rounding and adjustment comparators. Model simulation and prototype test results show that the proposed control technique clearly outperforms the previous control methods.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제53권7호
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• pp.452-461
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• 2004

A novel multilevel PWM inverter is presented for the use of stand-alone photovoltaic power generation system. In appearance, it consists of three full-bridge modules and three cascaded transformers; therefore, the configuration of the proposed multilevel PW inverter is equal to that of a prior 11-level PWM inverter. Only the turn-ratio of a transformer and its corresponding switching function are different from each other. Owing to these differences, the proposed 19-level PWM inverter has two promising advantages. First, output voltage levels increase almost twofold. Consequently, it can generate more sinusoidal output voltage waveform. Second, due to a revised switching pattern, it lightens power imposed on the transformer, which is used for compensating output voltages with chopped pulses between steps. The validity of the proposed inverter system is verified by computer-aided simulations and experimental results based on a 1 ［kW］ prototype. The performance of the proposed 19-level PWM inverter is compared with the Prior 11-level PWM inverter and other counterparts.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.5-9
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• 2003

Conventional variable-speed Induction motor drives with inverters are subject to detrimental effect of zero-sequence voltages, such a shaft voltage and bearing current. This paper presents a way of the suppression of the zero-sequence components in multilevel H-bridge inverters. First examined Is the inherent zero-sequence characteristic of the conventional subharmonic PW method. Then it is shown that the zero-sequence voltage can be eliminated with proper -selection of switching states with space vector modulation. Although this method alone restricts the linear modulation range of control, a combination of the proposed method and the minimum switching method appears to be effective in suppressing the zero-sequence voltage to minimum level while maintaining the linear control range.

• Journal of Power Electronics
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• 제16권2호
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• pp.522-531
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• 2016

This paper proposes a new NLC (Nearest Level Control) scheme for MMCs (Modular Multilevel Converters), which offers voltage ripple reductions in the DC capacitor of the SM (Sub-Module), the output voltage harmonics, and the switching losses. The feasibility of the proposed NLC was verified through computer simulations. Based on these simulation results, a hardware prototype of a 10kVA, DC-1000V MMC was manufactured in the lab. Experiments were conducted to verify the feasibility of the proposed NLC in an actual hardware environment. The experimental results were consistent with the results obtained from the computer simulations.