• Title/Summary/Keyword: Multichannel dynamic range compression

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Implementation of Multichannel Digital Hearing Aid Algorithm Development Platform using Simulink (Simulink 기반 다채널 디지털 보청기 알고리즘 개발 플랫폼 구현)

  • Byun, Jun;Min, Ji-hwan;Cha, Tae-hwan;Ji, You-na;Park, Young-cheol
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.9 no.2
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    • pp.205-212
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    • 2016
  • In this paper, we implement the development platform of multichannel digital hearing aid algorithm using Simulink provided by Matlab. The digital hearing aids are considered medical devices designed to compensate for hearing loss, they need to be correctly selected, to help a person who has difficulty in hearing. The development platform that implemented in this paper, includes WOLA filterbank for analysis/synthesis of input signal, Wide dynamic range compression for hearing loss compensation and adaptive filter for feedback cancellation. Using the development platform, algorithm parameters for each block can be set depending on the hearing aid user. Thus it is possible to test the algorithm before the machine language. As a result, the time for algorithm development can be saved and performance and computational complexity can be optimized.

Implementation of Adaptive Feedback Cancellation Algorithm for Multichannel Digital Hearing Aid (다채널 디지털 보청기에 적용 가능한 Adaptive Feedback Cancellation 알고리즘 구현)

  • Jeon, Shin-Hyuk;Ji, You-Na;Park, Young-Cheol
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.1
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    • pp.102-110
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    • 2017
  • In this paper, we have implemented an real-time adaptive feedback cancellation(AFC) algorithm that can be applied to multi-channel digital hearing aid. Multichannel digital hearing aid typically use the FFT filterbank based Wide Dynamic Range Compression(WDRC) algorithm to compensate for hearing loss. The implemented real-time acoustic feedback cancellation algorithm has one integrated structure using the same FFT filter bank with WDRC, which can be beneficial in terms of computation affecting the hearing aid battery life. In addition, when the AFC fails to operate due to nonlinear input and output, the reduction gain is applied to improve robustness in practical environment. The implemented algorithm can be further improved by adding various signal processing algorithm such as speech enhancement.

A Novel Multi-Channel Hearing Aid Algorithm with SMR(signal-to-masking ratio) Improvement (신호 대 마스킹 비 개선을 통한 다채널 보청 알고리즘)

  • 김헌중;홍민철;차형태
    • The Journal of the Acoustical Society of Korea
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    • v.19 no.8
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    • pp.12-21
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    • 2000
  • In this paper, we propose a novel hearing aid algorithm for sensorinural hearing loss restoration with multi-channel(band) dynamic range compression and psychoacoustics. In this way, we can present a normal perception condition to the impaired listener. The proposed algorithm make loudness scaling function achieve proper loudness level, and analysis masking property for the signal will be perceived to impaired listener, and then, restore normal spectral contrast using SMR(signal-to-masking ratio) defined by distance between the level of each frequency and masking threshold.

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Low-Power Implementation of A Multichannel Hearing Aid Using A General-purpose DSP Chip (범용 DSP 칩을 이용한 다중 채널 보청기의 저전력 구현)

  • Kim, Bum-Jun;Byun, Joon;Park, Young-Cheol
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.1
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    • pp.18-25
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    • 2018
  • In this paper, we present a low-power implementation of the multi-channel hearing aid system using a general-purpose DSP chip. The system includes an acoustic amplification algorithm based on Wide Dynamic Range Compression (WDRC), an adaptive howling canceller, and a single-channel noise reduction algorithm. To achieve a low-power implementation, each algorithm is re-constructed in forms of integer program, and the integer program is converted to the assembly program using BelaSigna(R) 250 instructions. Through experiments using the implementation system, the performance of each processing algorithm was confirmed in real-time. Also, the clock of the implementation system was measured, and it was confirmed that the entire signal processing blocks can be performed in real time at about 7.02MHz system clock.