• International Journal of Aeronautical and Space Sciences
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• v.2 no.2
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• pp.73-81
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• 2001

This paper describes the procedure to develop a robust estimator design method for a target tracker that accounts for both structured real parameter uncertainties and unknown inputs. Two robust design approaches are combined: the Mini-p-Norm. design method to consider real parameter uncertainties and the $H_{\infty}$ design technique for unknown disturbances and unknown inputs. Constant estimator gains are computed that guarantee the robust performance of the estimator in the presence of parameter variations in the target model and unknown inputs to the target. The new estimator has two design parameters. One design parameter allows the trade off between small estimator error variance and low sensitivity to unknown parameter variations. Another design parameter allows the trade off between the robustness to real parameter variations and the robustness to unknown inputs. This robust estimator design method was applied to the longitudinal motion tracking problem of a T-38 aircraft.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.9
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• pp.4587-4605
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• 2019

High Efficiency Video Coding (HEVC) suffers from high computational complexity due to its quad-tree structure in motion estimation (ME). This paper exposes an adaptive search range decision algorithm for accelerating HEVC integer-pel ME on GPU which estimates the optimal search range (SR) using a MAP (Maximum A Posteriori) estimator. There are three main contributions; First, we define the motion feature as the standard deviation of motion vector difference values in a CTU. Second, a MAP estimator is proposed, which theoretically estimates the motion feature of the current CTU using the motion feature of a temporally adjacent CTU and its SR without any data dependency. Thus, the SR for the current CTU is parallelly determined. Finally, the values of the prior distribution and the likelihood for each discretized motion feature are computed in advance and stored at a look-up table to further save the computational complexity. Experimental results show in conventional HEVC test sequences that the proposed algorithm can achieves high average time reductions without any subjective quality loss as well as with little BD-bitrate increase.

• Journal of KSNVE
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• v.6 no.5
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• pp.567-574
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• 1996

This paper concerns an articulated space robot with flexible links. The equations of its motion are derived by means of the Lagrangian mechanics. Assuming that magnitude of elastic motions are relatively small, the perturbation approach is taken to separate the original equations of motion into linear and nonlinear equations. Th effect the desired payload motion, open loop control inputs are first determined based on the nonlinear equations. One the other hand, in order to reduce the positional errors during the maneuver, vibration suppression is actively done with a feedforward control for disturbance cancellation to some extent. Additionally, for performance robustness against residual disturbance, an LQ control modified to have a prescribed degree of stability is applied based on the linear equations. Measurement equations are formulated to be used for the maximum likelihood estimator to reconstruct states from the original robot equations of motion. Finally, numerical simulations show effectiveness of the proposed control design scheme.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.7
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• pp.28-37
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• 1997

In this paper, we designed a motion estimator for MPEG-2 video coder using VHDL. Motion estimation is indispensable for encoding MPEG 2 video. Motion estimation takes over 50% computation power of video encoding 37 frames per second and is suitable for real-time processing. The number of data accesses for computation is fewer than 2 times compared with that of old one. This makes slower memory module available. We minimize input pins to migrate input data through PEs. This processor can compute various motio estimation modes at one calculation that is supported by MPEG-2 video standard. Also independent control architecture makes this processor a single processor or a sub module in amultimedia chip.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2001.05a
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• pp.318-324
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• 2001

In this paper we propose the adaptive scheme to place more search points as long as the operation tapability of the motion estimator in the video codec permits. And the proposed algorithm takes advantage of the intuitive fact that the quality of the decoded video is more degraded as the spatial frequency of the corresponding block is increased due to the augmentation of local minima per unit area. Thererore, we propose the scheme to enhance the quality by locating relatively more search points in the block with high frequency components by analyzing the spatial frequencies of the video sequence. As a result, the proposed scheme can adaptively place more search points possibly permitted by the motion estimator and guarantees better quality compared to the TSS and FS.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2001.11a
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• pp.219-224
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• 2001

An accurate tip position control of a single-link flexible manipulator subjected to torque disturbance is achieved by utilizing so called sliding mode controller with disturbance estimation (SMCDE). After formulating the governing equation of motion in the state 1pace representation, a stable sliding surface is designed via the LQR method. The SMCDE is then synthesized by integrating equivalent sliding mode controller with the disturbance estimator which is featured by an integrated average value of the imposed disturbance over a certain sampling period. The regulating tip motion of the flexible manipulator is evaluated by employing the proposed SMCDE.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.9
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• pp.86-94
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• 1998

This paper proposes a new fast block-matching algorithm, named MFSS(Modified Four-Step Search) algorithm, which has better performance and is more adequate for hardware realization than the existing fast algorithms. The proposed algorithm is suitable for hardware realization since it has a unique regularity during the search procedure. It is shown from simulation results that its performance is close to that of FS(Full Search) algorithm. This paper also proposes a VLSI architecture and presents some design results of a motion estimator and compensator which adopted the MFSS algorithm. The important aspects considered in designing a motion estimator and compensator are hardware complexity of design results, and total delay needed to generate the motion compensated data after finding the motion vectors. Hardware complexity is minimized by using just nine PE(Process Element)'s, and total delay is minimized by sharing search memory of the motion estimator and compensator.

• Transactions on Control, Automation and Systems Engineering
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• v.3 no.2
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• pp.117-123
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• 2001

To improve control performance of a non-linear system, many other reserches have used the sliding model control algorithm. The sliding mode controller is known to be robust against nonlinear and unmodeled dynamic terms. However, this algorithm raises the inherent chattering caused by excessive switching inputs around the sliding surface. Therefore, in order to solve the chattering problem and improve control performance, this study has developed the sliding mode controller with a perturbation estimator using the observer-based fuzzy adaptive network. The perturbation estimator based on the fuzzy adaptive network generates the control input of compensating unmodeled dynamics terms and disturbance. And the weighting parameters of the fuzzy adaptive network are updated on-line by adaptive law in order to force the estimation errors converge to zero. Therefore, the combination of sliding mode control and fuzzy adaptive network gives rise to the robust and intelligent routine. For evaluation control performance of the proposed approach, tracking control simulation is carried is carried out for the hydraulic motion simulator which is a 6-degree of freedom parallel manipulator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.66-76
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• 2009

The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.430-442
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• 2013

This paper presents a fast multi-reference frame integer motion estimator for H.264/AVC. The proposed system uses the previously proposed fast multi-reference frame algorithm. The previously proposed algorithm executes a full search area motion estimation in reference frames 0 and 1. After that, the search areas of motion estimation in reference frames 2, 3 and 4 are minimized by a linear relationship between the motion vector and the distances from the current frame to the reference frames. For hardware implementation, the modified algorithm optimizes the search area, reduces the overlapping search area and modifies a division equation. Because the search area is reduced, the amount of computation is reduced by 58.7%. In experimental results, the modified algorithm shows an increase of bit-rate in 0.36% when compared with the five reference frame standard. The pipeline structure and the memory controller are also adopted for real-time video encoding. The proposed system is implemented using 0.13 um CMOS technology, and the gate count is 1089K with 6.50 KB of internal SRAM. It can encode a Full HD video ($1920{\times}1080P@30Hz$) in real-time at a 135 MHz clock speed with 5 reference frames.