• Title/Summary/Keyword: Metal-graphene contact

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Recent Research Progresses in 2D Nanomaterial-based Photodetectors (2D 나노소재기반 광 센서 소자의 최근 연구 동향)

  • Jang, Hye Yeon;Nam, Jae Hyeon;Cho, Byungjin
    • Ceramist
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    • v.22 no.1
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    • pp.36-55
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    • 2019
  • Atomically thin two-dimensional (2D) nanomaterials, including transition metal dichalcogenides (TMDs), graphene, boron nitride, and black phosphorus, have opened up new opportunities for the next generation optoelectronics owing to their unique properties such as high absorbance coefficient, high carrier mobility, tunable band gap, strong light-matter interaction, and flexibility. In this review, photodetectors based on 2D nanomaterials are classified with respect to critical element technology (e.g., active channel, contact, interface, and passivation). We discuss key ideas for improving the performance of the 2D photodetectors. In addition, figure-of-merits (responsivity, detectivity, response speed, and wavelength spectrum range) are compared to evaluate the performance of diverse 2D photodetectors. In order to achieve highly reliable 2D photodetectors, in-depth studies on material synthesis, device structure, and integration process are still essential. We hope that this review article is able to render the inspiration for the breakthrough of the 2D photodetector research field.

Study on Finding Optimum Condition of Plasma Treatment on SiO2 Substrates to Reduce Contact Resistance at Graphene-Metal Interface (그래핀-금속 접촉 저항을 줄이기 위한 SiO2 기판 플라즈마 처리의 최적화 연구)

  • Gang, Sa-Rang;Ra, Chang-Ho;Lee, Dae-Yeong;Yu, Won-Jong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2013.05a
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    • pp.96-96
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    • 2013
  • 그래핀과 금속 결합에서 발생하는 접촉 저항을 줄이기 위한 목적으로, 소자 제작에 사용되는 $SiO_2$ 기판의 표면을 플라즈마를 사용하여 에칭하는 최적의 조건에 대해 연구하였다. 기존에 발표된 연구 결과에 따라 $SF_6$$O_2$를 섞어 플라즈마 처리를 하였고, 플라즈마 방전에 사용 된 두 가스의 혼합 비율을 조절함으로써 소자 제작에 적합한 조건을 찾고자 하였다. 플라즈마 처리 전후의 $SiO_2$ 기판의 표면 측정은 AFM (Atomic Force Microscope)을 사용하였고, 단면은 SEM(Scanning Electron Microscope)을 통해 확인하였다.

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Si-Containing Nanostructures for Energy-Storage, Sub-10 nm Lithography, and Nonvolatile Memory Applications

  • Jeong, Yeon-Sik
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.108-109
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    • 2012
  • This talk will begin with the demonstration of facile synthesis of silicon nanostructures using the magnesiothermic reduction on silica nanostructures prepared via self-assembly, which will be followed by the characterization results of their performance for energy storage. This talk will also report the fabrication and characterization of highly porous, stretchable, and conductive polymer nanocomposites embedded with carbon nanotubes (CNTs) for application in flexible lithium-ion batteries. It will be presented that the porous CNT-embedded PDMS nanocomposites are capable of good electrochemical performance with mechanical flexibility, suggesting these nanocomposites could be outstanding anode candidates for use in flexible lithium-ion batteries. Directed self-assembly (DSA) of block copolymers (BCPs) can generate uniform and periodic patterns within guiding templates, and has been one of the promising nanofabrication methodologies for resolving the resolution limit of optical lithography. BCP self-assembly processing is scalable and of low cost, and is well-suited for integration with existing semiconductor manufacturing techniques. This talk will introduce recent research results (of my research group) on the self-assembly of Si-containing block copolymers for the achievement of sub-10 nm resolution, fast pattern generation, transfer-printing capability onto nonplanar substrates, and device applications for nonvolatile memories. An extraordinarily facile nanofabrication approach that enables sub-10 nm resolutions through the synergic combination of nanotransfer printing (nTP) and DSA of block copolymers is also introduced. This simple printing method can be applied on oxides, metals, polymers, and non-planar substrates without pretreatments. This talk will also report the direct formation of ordered memristor nanostructures on metal and graphene electrodes by the self-assembly of Si-containing BCPs. This approach offers a practical pathway to fabricate high-density resistive memory devices without using high-cost lithography and pattern-transfer processes. Finally, this talk will present a novel approach that can relieve the power consumption issue of phase-change memories by incorporating a thin $SiO_x$ layer formed by BCP self-assembly, which locally blocks the contact between a heater electrode and a phase-change material and reduces the phase-change volume. The writing current decreases by 5 times (corresponding to a power reduction of 1/20) as the occupying area fraction of $SiO_x$ nanostructures varies.

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