• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.12.1-12.1
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• 2009

For the micro conductive line, memory device fabrication process use many expensive processes such as manufactur-ing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because nano-metal particles contained inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as FPCB, PCB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line on flexible PCB substrate for the next generation electronic circuit using Ag nano-particles contained ink. To improve the line tolerance on flexible PCB, metal lines are fabricated by sequential prinitng method. Sequential printing method has vari-ous merits about fine, thick and high resolution pattern lines without bulge.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.502-502
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• 2007

Current thin film process using memory device fabrication process use expensive processes such as manufacturing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as PCB, FCPB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line for the electronic circuit board using metal ink contains Ag nano-particles. Metal lines are fabricated by two types of printing methods. One is a conventional printing method which is able to quick fabrication of fine pattern line, but has various difficulties about thick and high resolution DPI(Dot per Inch) pattern lines because of bulge and piling up phenomenon. Another(Second) methods is sequential printing method which has a various merits of fabrication for fine, thick and high resolution pattern lines without bulge. In this work, conductivities of metal pattern line are investigated with respect to printing methods and pattern thickness. As a result, conductivity of thick pattern is about several un.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.11a
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• pp.72-73
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• 2012

Metal line을 형성하는 방법에는 그라비아 인쇄, 잉크젯 인쇄, photo 공정 후 박막 증착 공정 등을 많이 사용한다. 본 연구에서는 Micro-imprinting 공정과 DFR photo lithography 공정을 통해 음각의 미세한 pattern을 형성한 후 sputtering과 printing을 이용하여 pattern의 filling을 통해 metal line을 구현하는 것을 목표로 하였다. Pattern을 형성한 후 RIE 공정을 통해 기판 표면의 친수성 처리를 하고, SAM 공정을 통해 코팅 막의 소수성 처리를 하였다. Sputtering과 전면 프린팅 및 건조 후 strip 공정을 통해 metal line을 형성하고, 이에 대한 표면 특성과 전기적 특성을 분석하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.05a
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• pp.96-99
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• 1993

Electrical properties of the Thin Film Transistor(TFT) electrode metal films were investigated through the Test Elements Group(TEG) experiment. The main purpose of this investigation was to characterize the electrical resistance properties of patterned metal films with respect to the variations of film thickness and TEG metal line width. Aluminum(Al), Tantalum(Ta) and Chromium(Cr) that are currently used as TFT electrode films were selected as the probed metal films. To date, no work in the electrical characterizations of patterned electrodes of a-Si TFT was accomplished. Bulk resistance$(R_b)$, sheet resistance$(R_s)$, and resistivities($\rho$) of TEG patterned metal lines were obtained. Electrical continuity test of metal film lines was also performed in order to investigate the stability of metallization process. Almost uniform-linear variations of the electrical properties with respect to the metal line displacements was also observed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.349-349
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• 2010

Great performance of many semiconductor devices requirs the use of low-resistance ohmic contact. Typically, transmission line method (TLM) patterns are used to measure the specific contact resistance between silicon and metal. In this works, we investigate contact resistance for metal dependent (Cr/Ag, Ni) using TLM pattern based on silicon-on-insulator (SOI) wafer. The electrode with Ni linearly increases contact resistance as the pattern distance increase from $15{\mu}m$ to $75{\mu}m$ in accumulation part, but non-linearly increase in inversion part. In additional, the electrode with Cr/Ag linearly increases contact resistance as the pattern distance increase from $15{\mu}m$ to $75{\mu}m$ in inversion part, but non-linearly increase in accumulation part.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1119-1120
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• 2007

Nano-sized metal patterns were successfully fabricated on flexible PET substrate using nanoimprint lithography. 70nm line and space PMMA resist pattern was formed on PET substrate without residual layer by 'artial filling effect' and 20nm thin Cr metal layer was deposited by e-beam evaporation. Then, PMMA resist was selectively removed by acetone and 70nm narrow Cr pattern was formed.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.04a
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• pp.24-25
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• 2007

Nano-sized metal patterns were successfully fabricated on flexible PET substrate using nanoimprint lithography. 70nm line and space PMMA resist pattern was formed on PET substrate without residual layer by "partial filling effect' and 20nm thin Cr metal layer was deposited by e-beam evaporation. Then, PMMA resist was selectively removed by acetone and 70nm narrow Cr pattern was formed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.8
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• pp.1416-1421
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• 2008

A 10 dB branch line hybrid coupler included with defected ground structure (DGS) is proposed. In this contribution, a contact between the grounded metal housing and DGS is avoided, which has been a serious problem in applying DGS to high frequency circuits. An isolation between the metal housing and the DGS pattern is provided by inserting additional substrate between DGS and the metal package. Therefore, it is possible to design branch line hybrid couplers having highly asymmetric power dividing ratio using these DGS structure, which is demonstrated in this paper. The designed and fabricated branch line hybrid coupler using DGS is well packaged in a metal housing without touching the ground metal directly. The measurement is performed under realistic practical operating situations because it is packaged in a metal housing. The measured performances of the fabricated 10dB coupler shows a 1:9 asymmetric power dividing ratio at output ports, as predicted. In addition, the measured performances in terms of matching, isolation, and phase difference are in excellent agreement with the simulated characteristics.

• Korean Journal of Computational Design and Engineering
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• v.8 no.3
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• pp.150-156
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• 2003

Direct Metal Deposition (DMD) is a new additive process producing three-dimensional metal components or tools directly from CAD data, which aims to take mold making and metalworking in an entirely new direction. It is the blending of five common technologies: lasers, CAD, CAM, sensors and materials. In the resulting process, alternatively called laser cladding, an industrial laser is used to locally heat a spot on a tool-steel work piece or platform, forming a molten pool of metal. A small stream of powdered tool-steel metal is then injected into the metal pool to increase the size of the molten pool. By moving the laser beam back and forth, under CNC control, and tracing out a pattern determined by a computerized CAD design, the solid metal part is eventually built line-by-line, one layer at a time. DMD produces improved material properties in less time and at a lower cost than is possible with traditional fabrication technologies.

• Journal of the Semiconductor & Display Technology
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• v.22 no.2
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• pp.30-34
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• 2023

Since dishing in the CMP process is a major factor that hinders the uniformity of the semiconductor thin film, many studies have focused this issue to improve the non-uniformity of the film due to dishing. In the metal layer, the dishing mainly occurs in the central part of the metal due to a difference in a selection ratio between the metal and the dielectric, thereby generating a step on the surface of the metal layer. Factors that cause dishing include the shape of the thin film, the chemical reaction of the slurry, thermal deformation, and the rotational speed of the pad and head, and dishing occurs due to complex interactions between them. This study analyzed the stress generated on the metal layer surface in the CMP process using ANSYS software, a commercial structure analysis program. The stress caused by the vertical load applied from the pad was analyzed by changing the area density and line width of the dummy metal. As a result of the analysis, the stress in the active region decreased as the pattern density and line width of the dummy metal increased, and it was verified that it was valid compared with the previous study that studied the dishing according to the dummy pattern density and line width of the metal layer. In conclusion, it was confirmed that there is a relationship between dishing and normal stress.