• 제목/요약/키워드: Memory school

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청소년기 수면 부족과 시공간 기억력 저하 (Insufficient Sleep and Visuospatial Memory Decline during Adolescence)

  • 이창우;전세현;조성진;김석주
    • 수면정신생리
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    • 제26권1호
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    • pp.16-22
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    • 2019
  • 목 적: 본 연구의 목적은 청소년에서 전산화 신경인지 검사를 이용하여 수면 부족과 시공간 기억력 사이의 연관성에 대해 알아보는 것이다. 방 법: 심각한 내외과적 질환이 없는 만 16세에서 만 18세 사이의 고등학생 103명(남자 26명, 여자 77명, 평균 연령 $17.11{\pm}0.50$세)이 연구에 참여하였다. 모든 대상자에게 주중 총 수면 시간과 주말 총 수면 시간에 대한 자가 보고식 설문지를 작성하도록 하였다. 주간 졸음과 우울 증상의 정도를 평가하기 위해 엡워스 졸음 척도와 벡 우울 척도를 자가 작성하도록 하였다. 시공간 기억을 평가하기 위해 캠브리지 신경정신검사 자동화 총집의 7개 하부 검사를 실시하였다. 결 과: 나이와 성별, 엡워스 졸음 척도, 벡 우울 척도를 보정한 상관 분석의 결과는 다음과 같다. 주말 총 수면 시간이 길수록 지연 표본 대응(r = -0.312, p = 0.002)와 패턴 재인 기억의 즉각 회상(r = -0.225, p = 0.025)의 정답률이 낮았다. 주말 수면 보충 시간이 길수록 지연 표본 대응(r = -0.236, p = 0.018)과 패턴 재인 기억의 즉각 회상(r = -0.220, p = 0.029), 패턴 재인 기억의 지연 회상(r = -0.211, p = 0.036)의 정답률을 낮았다. 결 론: 주중 수면 부족를 반영하는 주말 수면 보충 시간이 길수록 시각 기억의 지연 회상에서 낮은 수행도를 보였다. 본 연구의 결과는 청소년기에 수면 부족이 심할수록 청소년의 시공간 기억력이 저하될 수 있다는 것을 시사한다.

Posterior Cervical Fixation with a Nitinol Shape Memory Loop for Primary Surgical Stabilization of Atlantoaxial Instability : A Preliminary Report

  • Kim, Duk-Gyu;Eun, Jong-Pil;Park, Jung-Soo
    • Journal of Korean Neurosurgical Society
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    • 제52권1호
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    • pp.21-26
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    • 2012
  • Objective : To evaluate a new posterior atlantoaxial fixation technique using a nitinol shape memory loop as a simple method that avoids the risk of vertebral artery or nerve injury. Methods : We retrospectively evaluated 14 patients with atlantoaxial instability who had undergone posterior C1-2 fusion using a nitinol shape memory loop. The success of fusion was determined clinically and radiologically. We reviewed patients' neurologic outcomes, neck disability index (NDI), solid bone fusion on cervical spine films, changes in posterior atlantodental interval (PADI), and surgical complications. Results : Solid bone fusion was documented radiologically in all cases, and PADI increased after surgery (p<0.05). All patients remained neurologically intact and showed improvement in NDI score (p<0.05). There were no surgical complications such as neural tissue or vertebral artery injury or instrument failure in the follow-up period. Conclusion : Posterior C1-2 fixation with a nitinol shape memory loop is a simple, less technically demanding method compared to the conventional technique and may avoid the instrument-related complications of posterior C1-2 screw and rod fixation. We introduce this technique as one of the treatment options for atlantoaxial instability.

수면 의존성 운동 학습에 대한 고찰 (A Review of Sleep-Dependent Motor Learning)

  • 이명희;이상열;박민철;배성수
    • PNF and Movement
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    • 제6권3호
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    • pp.19-28
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    • 2008
  • Purpose : The objective of this study was to determine efficacy of sleep-dependent motor learning. Methods : This is a literature study with books and internet. We searched the PubMed, Science Direct, KISS and DBpia. Key words were Sleep-dependent, motor learning, RAM and LTP. Results : Procedural memory, like declarative memory, undergoes a slow, time-dependent period of consolidation. A process has recently been described wherein performance on some procedural task improves with the mere passage of time and has been termed "enhancement". Some studies have reported that the consolidation/enhancement of perceptual and motor skill is dependent on sleep. Specially, rapid-eye-movement(REM) sleep seems to benefit procedural aspects of memory. Conclusion : Motor learning is very important for CNS injury patients. And also distribution of practice sessions is important because REM sleep is to benefit procedural aspects of memory consolidation.

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On-Demand Remote Software Code Execution Unit Using On-Chip Flash Memory Cloudification for IoT Environment Acceleration

  • Lee, Dongkyu;Seok, Moon Gi;Park, Daejin
    • Journal of Information Processing Systems
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    • 제17권1호
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    • pp.191-202
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    • 2021
  • In an Internet of Things (IoT)-configured system, each device executes on-chip software. Recent IoT devices require fast execution time of complex services, such as analyzing a large amount of data, while maintaining low-power computation. As service complexity increases, the service requires high-performance computing and more space for embedded space. However, the low performance of IoT edge devices and their small memory size can hinder the complex and diverse operations of IoT services. In this paper, we propose a remote on-demand software code execution unit using the cloudification of on-chip code memory to accelerate the program execution of an IoT edge device with a low-performance processor. We propose a simulation approach to distribute remote code executed on the server side and on the edge side according to the program's computational and communicational needs. Our on-demand remote code execution unit simulation platform, which includes an instruction set simulator based on 16-bit ARM Thumb instruction set architecture, successfully emulates the architectural behavior of on-chip flash memory, enabling embedded devices to accelerate and execute software using remote execution code in the IoT environment.

β-Asarone이 Lipopolysaccharide에 의한 생쥐 해마의 염증성 사이토카인 발현과 학습 및 기억 장애에 미치는 영향 (Effects of β-Asarone on Pro-Inflammatory Cytokines and Learning and Memory Impairment in Lipopolysaccharide-Treated Mice)

  • 최문숙;곽희준;권기중;황지모;신정원;손낙원
    • 대한본초학회지
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    • 제28권6호
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    • pp.119-127
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    • 2013
  • Objectives : ${\beta}$-Asarone (BAS) is an active ingredient in Acori Rhizoma. This study investigated anti-neuroinflammatory and memory ameliorating effects of BAS in systemic lipopolysaccharide (LPS)-treated C57BL/6 mice. Methods : BAS was administered orally at doses of 7.5, 15, and 30 mg/kg for 3 days prior to LPS (3 mg/kg, intraperitoneal) injection. Pro-inflammatory cytokine mRNA, including tumor necrosis factor-${\alpha}$ (TNF-ㅍ), interleukin (IL)-$1{\beta}$ and IL-6, was measured in hippocampus tissue using real-time polymerase chain reaction at 4 h after the LPS injection. An ameliorating effect of 30 mg/kg BAS on learning and memory impairment in the LPS-treated mice was verified using the Morris water maze test. Results : BAS significantly attenuated up-regulation of TNF-${\alpha}$, IL-$1{\beta}$, and IL-6 mRNA in hippocampus tissue of the LPS-treated mice. In acquisition training test, BAS improved learning performance of the LPS-treated mice with a significant decrease of escape latency to the platform. In memory retention test, BAS also ameliorated memory impairment of the LPS-treated mice with a significant increase of swimming time in zones neighboring to the platform, number of target heading, and memory score. Conclusion : The results suggest that inhibition of pro-inflammatory cytokines and neuroinflammation in the hippocampus by BAS could be one of the mechanisms for BAS-mediated ameliorating effect on learning and memory impairment in LPS-treated mice.

스마트 토이를 활용한 아동용 인지능력 증진 프로그램의 예비 효과 연구 (A Preliminary Study of Computerized Cognitive Ability Enhancement Program Using Smart-Toy for Children)

  • 신민섭;이정은;이지현;이진주;권은미;전혜진;이승환
    • Journal of the Korean Academy of Child and Adolescent Psychiatry
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    • 제28권2호
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    • pp.106-114
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    • 2017
  • Objectives: This study was to examine the effectiveness of computerized cognitive ability enhancement program (CCAEP) using Smarttoy. The CCAEP using Smart-toy which can interact with children via bluetooth is a kids-friendly and convenient method for improving children's cognitive abilities by increasing their motivation for performing the program. We developed the CCAEP which designed to train auditory-verbal memory, visual-spatial memory, auditory-verbal working memory, and visual-spatial working memory. Methods: Eighteen children aged 8 to 10 participated in CCAEP individual training composed of 8 sessions of 40 minutes each for 4 weeks. The effect of the training was measured with Smart Toyweb's cognitive assessment tasks (smart device based assessment) as well as traditional neuropsychological tests before and after the training. Results: Children showed significant improvement in auditory-verbal memory, visual-spatial memory, auditory-verbal working memory and visual-spatial working memory abilities after the training. Conclusion: This study demonstrated promising results suggesting the effectiveness of CCAEP using Smart-Toy in clinical settings as well as school and home situations. Further controlled study with larger sample size including various clinical groups is needed to confirm the present results.

Basic characteristics of metal-ferroelectric-insulator-semiconductor structure using a high-k PrOx insulator layer

  • Noda, Minoru;Kodama, Kazushi;Kitai, Satoshi;Takahashi, Mitsue;Kanashima, Takeshi;Okuyama, Masanori
    • E2M - 전기 전자와 첨단 소재
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    • 제16권9호
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    • pp.64.1-64
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    • 2003
  • A metal-ferroelectric [SrBi$_2$Ta$_2$O$\_$9/ (SBT)-high-k-insulator(PrOx)-semiconductor(Si) structure has been fabricated and evaluated as a key part of metal-ferroelectric-insulator-semiconductor-field-effect-transistor MFIS-FET memory, aiming to improve the memory retention characteristics by increasing the dielectric constant in the insulator layer and suppressing the depolarization field in the SBT layer. A 20-nm PrOx film grown on Si(100) showed both a high of about 12 and a low leakage current density of less than 1${\times}$ 10e-8 A/$\textrm{cm}^2$ at 105 MV/cm. A 400-nm SBT film prepared on PrOx/Si shows a preferentially oriented (105) crystalline structure, grain size of about 130 nm and subface roughness of 3.2 nm. A capacitance-voltage hysteresis is confirmed on the Pt/SBT/PrOx/Si diode with a memory window of 0.3V at a sweep voltage width of 12 V. The memory retention time was about 1 104s, comparable to the conventional Pt/SBT/SiO$\_$x/N$\_$y/(SiO$\_$N/)/Si. The gradual change of the capacitance indicates that some memory degradation mechanism is different from that in the Pt/SBT/SiON/Si structure.

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Accelerating Memory Access with Address Phase Skipping in LPDDR2-NVM

  • Park, Jaehyun;Shin, Donghwa;Chang, Naehyuck;Lee, Hyung Gyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.741-749
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    • 2014
  • Low power double data rate 2 non-volatile memory (LPDDR2-NVM) has been deemed the standard interface to connect non-volatile memory devices such as phase-change memory (PCM) directly to the main memory bus. However, most of the previous literature does not consider or overlook this standard interface. In this paper, we propose address phase skipping by reforming the way of interfacing with LPDDR2-NVM. To verify effectiveness and functionality, we also develop a system-level prototype that includes our customized LPDDR2-NVM controller and commercial PCM devices. Extensive simulations and measurements demonstrate up to a 3.6% memory access time reduction for commercial PCM devices and a 31.7% reduction with optimistic parameters of the PCM research prototypes in industries.