• Journal of Korea Society of Industrial Information Systems
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• v.16 no.1
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• pp.37-48
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• 2011

Sensor networks monitor the environment, collect sensed data, and relay the data back to a collection point. Although sensor nodes have very limited hardware resources, they require an operating system that can provide efficient resource management and various application environments. In addition, the wireless sensor networks require the code update previously deployed to patch bugs in program and to improve performance of kernel service routines and application programs. This paper presents EPRCU (Easy to Perform Remote Code Update), a new operating system for wireless sensor nodes, which has enhanced functionalities to perform remote code update. To achieve an efficient code update, the EPRCU provides dynamic memory allocation and program memory management. It supports the event-driven kernel, which uses priority-based scheduling with the application of aging techniques. Therefore, the proposed operating system is not only easy to perform wireless communication with the remote code update but also suitable for various sensor network applications.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.11
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• pp.572-580
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• 2007

Wireless sensor networks are sensing, computing and communication infrastructures that allow us to monitor, instrument, observe, and respond to phenomena in the harsh environment. Generally, the wireless sensor networks are composed of many deployed sensor nodes that were designed to be very cost-efficient in terms of production cost. For example, UC Berkeley's MICA motes have only 8-bit CPU, 4KB RAM, and 128KB FLASH memory space. Therefore, sensor operating systems that run on the sensor nodes should be able to operate efficiently in terms of the resource management. In this paper, we present a dynamic threads stack management scheme for space-constrained and multi-threaded sensor operating systems. In this scheme, the necessary stack space of each function is measured on compile-time. Then, the information is used to dynamically allocate and release each function's stack space on run-time. It was implemented in Nano-Qplus sensor operating system. Our experimental results show that the proposed scheme outperforms the existing fixed-size stack allocation mechanism.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.5
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• pp.385-393
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• 2021

This study proposes a multi-core-based controller design for an ESC(Electronic Stability Control) system in an automotive multi-core processor. Considering the architectures of an automotive multi-core processor and an ESC system, the overall execution time has been optimized for multi-core platforms. The function module assignment, synchronization between cores, and memory assignment for core-dependent variables in automotive multi-core systems are evaluated. The ESC controller comprising five function modules is used herein. Based on the proposed design, the single-core controller is extended to multi-core controllers. Using multi-core optimization methods, such as function module assignment, semaphore, interrupt awakening, and variable assignment over cores, the ESC system is redesigned to a multi-core controller. Experimental results reveal that the execution time for the multi-core processor is reduced by 59.7% compared with that for the single-core processor.

• Journal of Advanced Navigation Technology
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• v.11 no.3
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• pp.296-305
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• 2007

The HiLow, a hierarchical routing protocol for 6LoWPAN, needs smaller memory allocation and energy than other routing protocols. However, the HiLow has a weak point that does not provide the optimized routing path. In this paper, we propose the algorithm that can find the optimum next hop using neighboring nodes around the source node as well as hierarchical routing path information. We evaluate the performance of proposed algorithm using the computer simulation, and we can acquire results that decreases a number of hop count and transmitted message.

• Nuclear Engineering and Technology
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• v.31 no.3
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• pp.344-363
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• 1999

A multi-dimensional thermal-hydraulic system analysis code, MARS 1.3.1, has been developed in order to have the realistic analysis capability of two-phase thermal-hydraulic transients for pressurized water reactor (PWR) plants. As the backbones for the MARS code, the RELAP5/MOD3.2.1.2 and COBRA-TF codes were adopted in order to take advantages of the very general, versatile features of RELAP5 and the realistic three-dimensional hydrodynamic module of COBRA-TF. In the MARS code, all the functional modules of the two codes were unified into a single code first. Then, the source codes were converted into the standard Fortran 90, and then they were restructured using a modular data structure based on "derived type variables" and a new "dynamic memory allocation" scheme. In addition, the Windows features were implemented to improve user friendliness. This paper presents the developmental work of the MARS version 1.3.1 including the hydrodynamic model unification, the heat structure coupling, the code restructuring and modernization, and their verifications.their verifications.

• Journal of the Korean Society of Industry Convergence
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• v.3 no.2
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• pp.167-178
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• 2000

Software RAID(Redundant Arrays of Inexpensive Disks) is defined as a storage system that provides capabilities of hardware RAID, and guarantees high reliability as well as high performance. In this paper, we propose an enhanced disk scheduling algorithm and a scheme to guarantee reliability of data. We also design and implement software RAID by utilizing these mechanism to develop a storage system for multimedia applications. Because the proposed algorithm improves a defect of traditional GSS algorithm that disk I/O requests arc served in a fixed order, it minimizes buffer consumption and reduces the number of deadline miss through service group exchange. Software RAID also alleviates data copy overhead during disk services by sharing kernel memory. Even though the implemented software RAID uses the parity approach to guarantee reliability of data, it adopts different data allocation scheme. Therefore, we reduce disk accesses in logical XOR operations to compute the new parity data on all write operations. In the performance evaluation experiments, we found that if we apply the proposed schemes to implement the Software RAID, it can be used as a storage system for small-sized video-on-demand servers.

• Journal of Korea Society of Digital Industry and Information Management
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• v.9 no.1
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• pp.151-163
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• 2013

Recently the attention on digital hologram that is regarded as to be the final goal of the 3-dimensional video technology has been increased. Digital hologram is calculated by modeling the interference phenomenon between an object wave and a reference wave. The modeling for digital holograms is called by computer generated hologram (CGH) Generally, CGH requires a very large amount of calculation. So if holograms are generated in real time, high-speed method should be needed. In this paper, we analyzed CGH equation, optimized it for mapping general purpose graphic processing unit (GPGPU), and proposed a optimized CGH calculation technique for GPGPU by resource allocation and various experiments which include block size changing, memory selection, and hologram tiling. The implemented results showed that a digital hologram that has $1,024{\times}1,024$ resolution can be generated during approximately 24ms, using 1K point clouds. In the experiment, we used two GTX 580 GPGPU of nVidia Inc.

• Journal of Korea Technology Innovation Society
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• v.8 no.3
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• pp.1027-1059
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• 2005

The purpose of this paper is to analyze the dynamic characteristics of innovation sources such as scientific knowledges, processing technologies and user's needs in advanced metals technology. The journal articles data of four advanced materials are analyzed; amorphous metals, superplastic materials, shape memory alloys and aluminum-lithium alloy. Some regularities are found from the analysis of the four materials. The innovation proceeds through close interactions among the innovation sources. As the innovation proceeds, the relative importance of each source changes: scientific knowledge initiates the innovation and becomes the most important source in the first phase, then the processing technologies increase importance in the second phase, and then scientific knowledge, again, becomes the leading factor of innovation. Scientific knowledge and processing technology take turns leading the innovation. The impacts of users' needs to the innovation increase more and more as innovation proceeds. The results of analysis imply to the policy makers that emphasis of policy, and therefore the allocation of sources for innovation, should vary along the phases in the life cycle of advanced metals technology.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.3
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• pp.19-24
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• 2009

When a dynamic method is applied at the time of occurrence of an client's connection request for most of the online gaming server engine, the gaming server is processing a session connection, it's initialization. Yet, such a method will cause a lot of loading and bottle-neck in the gaming server at the same time. Therefore we propose the object polling scheme to minimizes a memory fragmentation and loading of the initialization on the client using a static allocation method for an efficient On-lin gaming serverin this paper. We implement the gaming server applying to our proposed scheme, and we show an improvement in our proposed scheme by performance analysis in this paper.

• Journal of the Korean Institute of Telematics and Electronics
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• v.17 no.5
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• pp.36-42
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• 1980

In this study, multi-microprocessors system in which slave microprocessor is conrlected with master microprocessor bus through the DMA controller is designed by the use of four 8085 CPU. A high degree of processing efficiency could be obtained by making this system work parallel processing. The result of measuring relat ions bet ween working microproressor and system throughput was 70-80 percents lower than ideal value Master microprocessor takes charge of resource allocation and scheduling, common memory assigns communication between microprocessors and a store of common data. The met hod of detecting Pa rallelism from source Program composed by series is also suggested.