• Journal of Korea Society of Industrial Information Systems
• /
• v.29 no.3
• /
• pp.41-49
• /
• 2024

In this paper, we validate simulation results for the design optimization of a Superconducting Fault Current Limiter (SFCL) intended for use in Medium Voltage Direct Current systems (MVDC). With the increasing integration of renewable energy and grid connections, researchers are focusing on medium-voltage systems for balancing energy in new and renewable energy networks, rather than traditional transmission or distribution networks. Specifically, for DC distribution networks dealing with fault currents that must be rapidly blocked, current-limiting systems like superconducting current limiters offer distinct advantages over the operation of DC circuit breakers. The development of such superconducting current limiters requires finite element analysis (FEM) and an extensive design process before prototype production and evaluation. To expedite this design process, the design outcomes are assimilated using a Reduced Order Model (ROM). This approach enables the verification of results akin to finite element analysis, facilitating the optimization of design simulations for production and mass production within existing engineering frameworks.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.63 no.12
• /
• pp.1640-1648
• /
• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.