• Title/Summary/Keyword: M-ICT

Search Result 519, Processing Time 0.029 seconds

Next-Generation Neuromorphic Hardware Technology (차세대 뉴로모픽 하드웨어 기술 동향)

  • Moon, S.E.;Im, J.P.;Kim, J.H.;Lee, J.;Lee, M.Y.;Lee, J.H.;Kang, S.Y.;Hwan, C.S.;Yoo, S.M.;Kim, D.H.;Min, K.S.;Park, B.H.
    • Electronics and Telecommunications Trends
    • /
    • v.33 no.6
    • /
    • pp.58-68
    • /
    • 2018
  • A neuromorphic hardware that mimics biological perceptions and has a path toward human-level artificial intelligence (AI) was developed. In contrast with software-based AI using a conventional Von Neumann computer architecture, neuromorphic hardware-based AI has a power-efficient operation with simultaneous memorization and calculation, which is the operation method of the human brain. For an ideal neuromorphic device similar to the human brain, many technical huddles should be overcome; for example, new materials and structures for the synapses and neurons, an ultra-high density integration process, and neuromorphic modeling should be developed, and a better biological understanding of learning, memory, and cognition of the brain should be achieved. In this paper, studies attempting to overcome the limitations of next-generation neuromorphic hardware technologies are reviewed.

M-Government

  • Korean Associaton of Information & Telecommunication
    • 정보화사회
    • /
    • s.161
    • /
    • pp.26-26
    • /
    • 2003
  • PDF

Measurement of Heat Transfer Coefficient of Magnesium Alloy and Temperature Change of Roll using Heat Transfer Solidification Analysis Method (전열응고해석법을 이용한 마그네슘합금의 열전달계수 및 롤의 온도변화 측정)

  • Han, Chang-Suk;Lee, Chan-Woo
    • Korean Journal of Materials Research
    • /
    • v.32 no.9
    • /
    • pp.391-395
    • /
    • 2022
  • Research is being actively conducted on the continuous thin plate casting method, which is used to manufacture magnesium alloy plate for plastic processing. This study applied a heat transfer solidification analysis method to the melt drag process. The heat transfer coefficient between the molten magnesium alloy metal and the roll in the thin plate manufacturing process using the melt drag method has not been clearly established until now, and the results were used to determine the temperature change. The estimated heat transfer coefficient for a roll speed of 30 m/min was 1.33 × 105 W/m2·K, which was very large compared to the heat transfer coefficient used in the solidification analysis of general aluminum castings. The heat transfer coefficient between the molten metal and the roll estimated in the range of the roll speed of 5 to 90 m/min was 1.42 × 105 to 8.95 × 104 W/m2·K. The cooling rate was calculated using a method based on the results of deriving the temperature change of the molten metal and the roll, using the estimated heat transfer coefficient. The DAS was estimated from the relationship between the cooling rate and DAS, and compared with the experimental value. When the magnesium alloy is manufactured by the melt drag method, the cooling rate of the thin plate is in the range of about 1.4 × 103 to 1.0 × 104 K/s.

Investigation into Electrical Characteristics of Logic Circuit Consisting of Modularized Monolithic 3D Inverter Unit Cell

  • Lee, Geun Jae;Ahn, Tae Jun;Lim, Sung Kyu;Yu, Yun Seop
    • Journal of information and communication convergence engineering
    • /
    • v.20 no.2
    • /
    • pp.137-142
    • /
    • 2022
  • Monolithic three-dimensional (M3D) logics such as M3D-NAND, M3D-NOR, M3D-buffer, M3D 2×1 multiplexer, and M3D D flip-flop, consisting of modularized M3D inverters (M3D-INVs), have been proposed. In the previous M3D logic, each M3D logic had to be designed separately for a standard cell library. The proposed M3D logic is designed by placing modularized M3D-INVs and connecting interconnects such as metal lines or monolithic inter-tier-vias between M3D-INVs. The electrical characteristics of the previous and proposed M3D logics were simulated using the technology computer-aided design and Simulation Program with Integrated Circuit Emphasis with the extracted parameters of the previously developed LETI-UTSOI MOSFET model for n- and p-type MOSFETs and the extracted external capacitances. The area, propagation delay, falling/rising times, and dynamic power consumption of the proposed M3D logic are lower than those of previous versions. Despite the larger space and lower performance of the proposed M3D logic in comparison to the previous versions, it can be easily designed with a single modularized M3D-INV and without having to design all layouts of the logic gates separately.