Annealing Effects of Tunneling Dielectrics Stacked $SiO_2/Si_3N_4$ Layers for Non-volatile Memory
(비휘발성 메모리를 위한 $SiO_2/Si_3N_4$ 적층 구조를 갖는 터널링 절연막의 열처리 효과)
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- Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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- 2008.11a
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- pp.128-129
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- 2008