• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.2 no.1
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• pp.59-64
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• 2009

In this paper, a novel low complexity linear receiver is proposed that is used at the receiver of MIMO systems. Zero-forcing (ZF) and minimum mean squared error (MMSE) receivers are common linear receivers. ZF receiver is simpler than MMSE receiver from the hardware implementation perspective, howerver, MMSE shows better performance than ZF. In general, MCS level changes according to channel condition. This paper shows the benefit of choosing between MMSE and ZF according to the selected MCS level. We implement the MCS-adaptive linear receiver as hardware, and show that its complexity is comparable to the conventional MMSE receiver.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.15-19
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• 2003

In this paper, the bit error rate (BER) performance of the fast frequency hopping/M-ary frequency shift keying system using the clipper receiver is analyzed by using the characteristic function (CF) technique in the presence of n=1 band multitone jamming and additive white Gaussian noise environment. The CFs of the clipper receiver outputs are derived as a infinite series representation using Gamma function and Marcum's Q -function. The analytical results are validated with various simulation results. Performance comparisons with linear combining receiver are shown that the BER performance of the clipper receiver is much better than that of the linear combining receiver In addition, as the clipping level approaches to infinity, it is shown that the clipper receiver simply performs a linear combining without clipping and there exists an optimum value of diversity level (the number of hops per symbol) that maximizes the worst case BER performance of the clipper receiver.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.110-113
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• 1998

An analysis of the relationship between a linear amplifier chain and an analog-to-digital converter(ADC) in a digital microwave widevand receiver, with respect to sensitivity and dynamic range issues, is presented. The effects of gain, third-order intermodulation products and ADC characteristics on the performance of the receiver are illustrated and design criteria for the linear amplifier chain given a specified ADC are developed. A computer program is used to calculate theretical receiver performance based on gain and third-order intermodulation product selections. Simulated results are also presented and compared with theoretical values.

• Journal of Communications and Networks
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• v.17 no.1
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• pp.1-11
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• 2015

In this paper, the transmission of an improper-complex second-order stationary data sequence is considered over a strictly band-limited frequency-selective channel. It is assumed that the transmitter employs linear modulation and that the channel output is corrupted by additive proper-complex cyclostationary noise. Under the average transmit power constraint, the problem of minimizing the mean-squared error at the output of a widely linear receiver is formulated in the time domain to find the optimal transmit and receive waveforms. The optimization problem is converted into a frequency-domain problem by using the vectorized Fourier transform technique and put into the form of a double minimization. First, the widely linear receiver is optimized that requires, unlike the linear receiver design with only one waveform, the design of two receive waveforms. Then, the optimal transmit waveform for the linear modulator is derived by introducing the notion of the impropriety frequency function of a discrete-time random process and by performing a line search combined with an iterative algorithm. The optimal solution shows that both the periodic spectral correlation due to the cyclostationarity and the symmetric spectral correlation about the origin due to the impropriety are well exploited.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.6 no.1
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• pp.27-31
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• 1981

This paper deals with the variation of the effective detectability factor fo logarithmic receiver in noise interference environment. The computed results as a function of maximum detection range and jamming range were compared with the effective detectability factor for linear receiver. Even though the logarithmic receiver has a wide dynamic characteristics, it is found that the effective detectability factor being reduced about 15% than the linear receiver at 100 KM range.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.8
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• pp.2023-2032
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• 1996

In this paper, we calculate average bit error probabilities of asynchronous hybrid DS/FH-SSMA systems in AWGN chnnel and nonselective Rayleigh fading channel. We analyze and compare the performance of systems in AWGN channel and Rayleigh fading channel by using linear correlation receiver and hard limiting correlation receiver(nonlinear correlation receiver). Binary PSK scheme is considered and random spreading code sequences and random hopping patterns are used. Bit error probabilities of the systems with/without near-far problem under the same bandwidth expansion are calculated. the result shows that the performance of hard limiting correlation receiver is better than that of linear correlation receiver over nonselective Rayleigh fading channel.

• Journal of Advanced Navigation Technology
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• v.16 no.6
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• pp.952-959
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• 2012

In this paper, we propose an ESPRIT based algorithm for target position estimation with uniform linear array (ULA) and uniform circular array (UCA) at transmitter and receiver, respectively. When UCA is adopted at the receiver, unlike the case of ULA at the receiver, the rotational invariance of the received signal is satisfied. Although there has been an attempt to resolve this issue, the problem of direction of departure estimation has not been considered. In this paper, we provide an ESPRIT based algorithm to simultaneously estimate transmitter elevation angle, receiver elevation angle, and receiver azimuth angle, taking into account the transmitter antennas as well as the receiver antennas.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.6
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• pp.1537-1544
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• 2012

In this paper, a new integration of linear mapping capability with 4-20mA current loop receiver. This module allow user to change instrument variable instantly. Configurations are easy to set by using console command through serial communication port. Break in current loop or faulty current transmitter are easily detect through indicator. The implementation of the module and the test results are discussed.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.219-223
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• 2003

This paper describes an estimation of DOA(Direction Of Arrival) measurement system using DBF receiver with linear array antenna. This DBF receiver is composed of resistive FET mixer using low IF mettled. A radio frequency(RF), a local oscillator(LO) and ail intermediate frequency(IF) considered in this research are 2.09 GHz, 2.08 GHz and 10 MHz, respectively. This receiver is composed of a band-pass filter, a low-pass filter, a DC bias circuit. DOA measurement system is consist of linear array antenna, DBF receiver, AD control box and computer in the anechoic chamber. Receiving antenna is 4-array monopole antenna and DBF receiver is 4-Ch resistive FET mixer without amplifier. DOA algorithm is implemented using MUSIC algorithm with high resolution. We show that the results of DOA is $-30^{\circ},\;0^{\circ}$ and $60^{\circ}$, respectively. And we know that DOA estimation error occur by antenna radiation pattern and fabrication error of antenna array.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.54-61
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• 2016

A 6-Gbps single-ended receiver with a linear equalizer and a self-reference generator is proposed for a high-speed interface with the double data rate. The proposed single-ended receiver uses a common gate amplifier to increase a voltage gain for an input signal with low voltage level. The continuous-time linear equalizer which reduces gain to the low frequencies and achieves high-frequency peaking gain is implemented in the common gate amplifier. Furthermore, a self-reference generator, which is controlled with the resolution 2.1 mV using digital averaging method, is implemented to maximize the voltage margin by removing the offset noise of the common gate amplifier. The proposed single-ended receiver is designed using a 65-nm CMOS process with 1.2-V supply and consumes the power of 15 mW at the data rate of 6 Gbps. The peaking gain in the frequency of 3 GHz of the designed equalizer is more than 5 dB compared to that in the low frequency.