• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.6
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• pp.2484-2490
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• 2012

This study reports on the development and performance verification of cell simulation boards of simulator and the embedded program for board control of the battery management system (BMS) of electric vehicle (EV) cars, which manages the next-generation automotive lithium-ion battery pack. Here, we have improved the speed of the simulator by using operational (OP) amplifier and transistors that were connected in series. In addition, using a digital analog converter (DAC) in each channel, we have improved the performance by channel-to-channel isolation (isolation) as compared to the traditional methods. Furthermore, by constructing a current-limiting protection circuit, one can be protected from disturbance and, by utilizing a precision shunt resistor for the current sensor, we have increased the precision of the current control. In order to verify the performance of the developed simulator, we have performed the experiment 10 times, with values ranging from 0.5 V to 5 V, and a voltage drop step of 0.5 V. Significance analysis of experimental data, and repeatability tests were performed, showing an average standard deviation of 0.001~0.004 V, indicating high repeatability and high statistical significance of the current method and system.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.2
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• pp.167-174
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• 2012

The circuits including with Optical transceiver and clock data recovery, in this paper, SERDES (SERializer-DESerializer) are implemented to construct a GE-PON burst-mode transceiver supporting IEEE 802.3ah and a jig for measuring the burst-mode characteristics, that is to say, PON upstream optical transmission environment are manufactured to evaluate the performance of transceiver. we verified that the limiting amplifier compensated the gap of max. 26dB optical power by experiments. The startup acquisition lock time is 670ns in case of using VSC7123 and 2300ns in case of S2060 and the data acquisition lock time were measured to be 400ns and 600ns, respectively, in the upstream channel transmission in this work. While on the other, VSC7123 is satisfied with IEEE802.3ah recommendations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.6
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• pp.1602-1609
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• 1998

In this paper, the design and implementation of the novel RF front end circuit for CDMA based PCS phone is described. This novel scheme is realized by building the power amplifier module combined with duplexer. The dielectric filters which are parts of duplexer are broken up and relocated into the module. Electromagnetic analysis for via holes and coupling between narrow transmissio lines is icluded to design a circuit. The combined moule has been minimaturized to be as small as 1.5CC. It has satisfied IS-95 requirements for linearity performances of CDMA signal at 24-dBm output power as well as played apart as a duplexer. The operating current of about 95mA has been saved owing to both rearranging dielectric filters and limiting operating point to class-B by considering real working power range of CDMA phones.