• Title/Summary/Keyword: Laser annealing

Search Result 331, Processing Time 0.023 seconds

Fabrication of 6H-SiC MOSFET and Digital IC (6H-SiC MOSFET과 디지털 IC 제작)

  • 김영석;오충완;최재승;송지헌;이장희;이형규;박근형
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.16 no.7
    • /
    • pp.584-592
    • /
    • 2003
  • 6H-SiC MOSFETs and digital ICs have been fabricated and characterized. PMOS devices are fabricated on an n-type epilayer while the NMOS devices are fabricated on implanted p-wells. NMOS and PMOS devices use a thermally grown gate oxide. SiC MOSFETs are fabricated using different impurity activation methods such as high temperature and newly proposed laser annealing methods. Several digital circuits, such as resistive road NMOS inverters, CMOS inverters, resistive road NMOS NANDs and NORs are fabricated and characterized.

Schottky Barrier Thin Film Transistor by using Platinum-silicided Source and Drain (플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터)

  • Shin, Jin-Wook;Chung, Hong-Bay;Lee, Young-Hie;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.22 no.6
    • /
    • pp.462-465
    • /
    • 2009
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method, The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than 10), Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

A Study on Torch Path Generation for Laser Cutting Process (레이저 절단공정에서의 토지경로 생성에 관한 연구)

  • Han, Guk-Chan;Na, Seok-Ju
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.20 no.6
    • /
    • pp.1827-1835
    • /
    • 1996
  • This paper addresses the problem of a torch path generation for the 2D laser cutting of a stock plate nested with resular or irregular parts. Under the constaint of the relative positions of parts enforced by nesting, the developed torch path algorithm generate feasible cutting path. In this paper, the basic object is a polygon( a many-slide figure) with holes. A part may be represented as a number of line segments connected end-to-end in counterclockwise order, and formed a closed contour as requied for cutting paths. The objective is to tranverse this cutting contours with a minimum path length. This paper proposes a simulated annealing based dtorch path algorithm, that is an improved version of previously suggested TSP models. Since everypiercing point of parts is not fixed in advance, the algorithm solves as relazed optimization problem for the constraint, thich is one of the main features of the proposed algorithm. For aolving the torch path optimization problem, an efficient generation mechanism of neighborhood structure and as annealing shedule were introduced. In this way, a global solution can be obtained in a reasonable time. Seveeral examples are represented to ilustrate the method.

Poly-Si Thin Film Transistor with poly-Si/a-Si Double Active Layer Fabricated by Employing Native Oxide and Excimer Laser Annealing (자연 산화막과 엑시머 레이저를 이용한 Poly-Si/a-Si 이중 박막 다결정 실리콘 박막 트랜지스터)

  • Park, Gi-Chan;Park, Jin-U;Jeong, Sang-Hun;Han, Min-Gu
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.49 no.1
    • /
    • pp.24-29
    • /
    • 2000
  • We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

  • PDF

Effects of Oxygen Partial Pressure and Post-Annealing Temperature on Structure of ZnO Thin Film Prepared by Pulsed Laser Deposition (PLD를 이용한 ZnO 박막의 구조에 산소 분압 및 후열처리 온도가 미치는 영향)

  • Cho, Dae-Hyung;Kim, Ji-Hong;Koo, Sang-Mo;Moon, Byung-Moo
    • Proceedings of the KIEE Conference
    • /
    • 2007.11a
    • /
    • pp.88-89
    • /
    • 2007
  • ZnO thin films were deposited on $Al_2O_3$ (alumina) substrates by pulsed laser deposition (PLD) using Nd:YAG laser with a wavelength of 355nm, at room temperature and oxygen partial pressure of 1, 10, 30, 50, 100, and 200m Torr. Furthermore, deposited ZnO thin films were post-annealed at 400, 550, $600^{\circ}C$. The effects of oxygen partial pressure and post-annealing temperature on structural properties of the deposited films have been investigated by means of X-ray diffraction (XRD), and atomic force microscope (AFM), respectively. It has been found that ZnO thin films exhibit c-axis orientation, exhibiting an increased foil width at half maximum (FWHM) value of (002) diffraction peak at 30m Torr oxygen partial pressure and higher post-annealing temperature ($700^{\circ}C$).

  • PDF

Improvement of AlGaAs/GaAs Quantum Well Laser Diodes by Thermal Annealing (AlGaAs/GaAs 레이저 다이오우드의 열처리에 의한 개선에 관한 연구)

  • Jung, Hyon-Pil;Kenzhou Xie;Wie, Chu-Ryang;Lee, Yun-Hyun
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.18 no.3
    • /
    • pp.449-455
    • /
    • 1993
  • In order to investigate the improvements of relatively poor characteristics of short wave length AlGaAs/GaAs laser diodes which are useful as a light source for short distance communication systems, the low temperature $(<680^{\circ}C)$ grown AlGaAs/GaAs GRINSCH-QW laser diodes by molecular beam epitaxy have been studied by photoluminescence as a function of rapid thermal annealing (RTA) temperature. It is shown that guantum well photoluminescence intensity increased substantially by a factor of 10 after RAT at $950^{\circ}C$ for 10 sec. This is related to the reduction of non-radiative recombination in the guantum well region. The threshold current of annealed laser diode is reduced by a factor, of 4, confirming the improvement of laser diode quality by rapid thermal annealing.

  • PDF

Passivation Effects of Excimer-Laser-Induced Fluorine using $SiO_{x}F_{y}$ Pad Layer on Electrical Characteristics and Stability of Poly-Si TFTs ($SiO_{x}F_{y}$/a-Si 구조에 엑시머 레이저 조사에 의해 불소화된 다결정 실리콘 박막 트랜지스터의 전기적 특성과 신뢰도 향상)

  • Kim, Cheon-Hong;Jeon, Jae-Hong;Yu, Jun-Seok;Han, Min-Gu
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.48 no.9
    • /
    • pp.623-627
    • /
    • 1999
  • We report a new in-situ fluorine passivation method without in implantation by employing excimer laser annealing of $SiO_{x}F_{y}$/a-Si structure and its effects on p-channel poly-Si TFTs. The proposed method doesn't require any additional annealing step and is a low temperature process because fluorine passivation is simultaneous with excimer-laser-induced crystallization. A in-situ fluorine passivation by the proposed method was verified form XPS analysis and conductivity measurement. From experimental results, it has been shown that the proposed method is effective to improve the electrical characteristics, specially field-effect mobility, and the electrical stability of p-channel poly-Si TFTs. The improvement id due to fluorine passivation, which reduces the trap state density and forms the strong Si-F bonds in poly-Si channel and $SiO_2/poly-Si$ interface. From these results, the high performance poly-Si TFTs canbe obtained by employing the excimer-laser-induced fluorine passivation method.

  • PDF

Study of Thermal Behaviors on sub-50 nm Copper Nanoparticles by Selective Laser Sintering Process for Flexible Applications (선택적 레이저 공정을 이용한 구리 나노 입자의 소결 특징 분석 및 플렉서블 전자 소자 제작 기술 개발에 관한 연구)

  • Gwon, Jin-Hyeong;Jo, Hyeon-Min;Lee, Ha-Beom;Eom, Hyeon-Jin;Go, Seung-Hwan
    • Proceedings of the Korean Institute of Surface Engineering Conference
    • /
    • 2016.11a
    • /
    • pp.134-134
    • /
    • 2016
  • The effect of different thermal treatments on the sub-50 nm copper nanoparticles is examined in the aspects of chemical, electrical and surface morphology. The copper nanoparticles are chemically synthesized and fabricated for paste-type solution. Simple bar coating method is practiced as a deposition process to form copper thin film on a typical slide glass. Deposited copper thin films are annealed by two different routes: general tube furnace with 99.99 % Ar atmosphere and selective laser sintering process. The thermal behavior of the different thermal-treated copper thin films is compared by SEM, XRD, FT-IR and XPS analysis. In this study, the laser sintering process ensures low annealing temperature, fast working speed and ambient-accessible route. Moreover, the laser-sintered copper thin film shows good electrical property and enhanced chemical stability than conventional thermal annealing process. Consequently, the proposed laser sintering process can be compatible with plastic substrate for flexible applications.

  • PDF

Impact of CO2 Laser Pretreatment on the Thermal Endurance of Bragg Gratings

  • Gunawardena, Dinusha Serandi;Lai, Man-Hong;Lim, Kok-Sing;Ahmad, Harith
    • Journal of the Optical Society of Korea
    • /
    • v.20 no.5
    • /
    • pp.575-578
    • /
    • 2016
  • The thermal endurance of fiber Bragg gratings (FBGs), written with the aid of 193-nm ArF excimer laser irradiation on H2-loaded Ge/B codoped silica fiber, and pretreated with a CO2 laser and a subsequent slow cooling process, is investigated. These treated gratings show relatively less degradation of grating strength during the thermal annealing procedure. The thermal decay characteristics of treated and untreated fiber, recorded over a time period of 9 hours, have been compared. The effect on the Bragg transmission depth (BTD) and the center-wavelength shift, as well as the growth of refractive-index change during the grating inscription process for both treated and untreated fiber, are analyzed.

Ultra Shallow Junction wish Source/Drain Fabricated by Excimer Laser Annealing and realized sub-50nm n-MOSFET (엑시머 레이져를 이용한 극히 얕은 접합과 소스, 드레인의 형성과 50nm 이하의 극미세 n-MOSFET의 제작)

  • 정은식;배지철;이용재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2001.07a
    • /
    • pp.562-565
    • /
    • 2001
  • In this paper, novel device structures in order to realize ultra fast and ultra small silicon devices are investigated using ultra-high vacuum chemical vapor deposition(UHVCVD) and Excimer Laser Annealing (ELA). Based on these fundamental technologies for the deep sub-micron device, high speed and low power devices can be fabricated. These junction formation technologies based on damage-free process for replacing of low energy ion implantation involve solid phase diffusion and vapor phase diffusion. As a result, ultra shallow junction depths by ELA are analyzed to 10~20nm for arsenic dosage(2${\times}$10$\_$14//$\textrm{cm}^2$), exciter laser source(λ=248nm) is KrF, and sheet resistances are measured to 1k$\Omega$/$\square$ at junction depth of 15nm and realized sub-50nm n-MOSFET.

  • PDF