• 제목/요약/키워드: Laser annealing

검색결과 331건 처리시간 0.032초

GaN계 수직형 발광 다이오드를 위한 N-face n-GaN의 인듐계 저저항 오믹접촉 연구 (Low Resistance Indium-based Ohmic Contacts to N-face n-GaN for GaN-based Vertical Light Emitting Diodes)

  • 강기만;박민주;곽준섭;김현수;권광우;김영호
    • 대한금속재료학회지
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    • 제48권5호
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    • pp.456-461
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    • 2010
  • We investigated the In-based ohmic contacts on Nitrogen-face (N-face) n-type GaN, as well as Ga-face n-type GaN, for InGaN-based vertical Light Emitting Diodes (LEDs). For this purpose, we fabricated Circular Transfer Length Method (CTLM) patterns on the N-face n-GaN that were prepared by using a laser-lift off method, as well as on the Ga-face n-GaN that were prepared by using a dry etching method. Then, In/transparent conducting oxide (TCO) and In/TiW schemes were deposited on the CTLM in order for low resistance ohmic contacts to form. The In/TCO scheme on the Ga-face n-GaN showed high specific contact resistance, while the minimum specific contact resistance was only 3${\times}$10$^{-2}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$, which can be attributed to the high sheet resistance of the TCO layer. In contrast, the In/TiW scheme on the Ga-face n-GaN produced low specific contact resistance of 2.1${\times}$10$^{5}$ $\Omega$-cm$^{2}$ after annealing at 500${^{\circ}C}$ for 1 min. In addition, the In/TiW scheme on the N-face n-GaN also resulted in a low specific contact resistance of 2.2${\times}$10$^{-4}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$. These results suggest that both the Ga-face n-GaN and N-face n-GaN.

Low temperature pulsed ion shower doping for poly-Si TFT on plastic

  • Kim, Jong-Man;Hong, Wan-Shick;Kim, Do-Young;Jung, Ji-Sim;Kwon, Jang-Yeon;Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.95-97
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    • 2004
  • We studied a low temperature ion doping process for poly-Si Thin Film Transistor (TFT) on plastic substrates. The ion doping process was performed using an ion shower system, and subsequently, excimer laser annealing (ELA) was done for the activation. We have studied the crystallinity of Si surface at each step using UV-reflectance spectroscopy and the sheet resistance using 4-point probe. We found that the temperature has increased during ion shower doping for a-Si film and the activation has not been fulfilled stably because of the thermal damage against the plastic substrate. By trying newly a pulsed ion shower doping, the ion was efficiently incorporated into the a-Si film on plastic substrate. The sheet resistance decreased with the increase of the pulsed doping time, which was corresponded to the incorporated dose. Also we confirmed a relationship between the crystallinity and the sheet resistance. A sheet resistance of 300 ${\Omega}$/sq for the Si film of 50nm thickness was obtained with a good reproducibility. The ion shower technique is a promising doping technique for ultra low temperature poly-Si TFTs on plastic substrates as well as those on glass substrates.

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염료감응 태양전지에서 전면전극/FTO 사이에 완충층으로서의 PLD로 증착한 $TiO_2$ 박막에 관한 연구 (A Study on $TiO_2$ Thin Film by PLD for Buffer Layer between Front Electrode and FTO of Dye-sensitized Solar Cell)

  • 송상우;노지형;이경주;지민우;문병무
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.465-466
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    • 2009
  • Dye-sensitized Solar Cell (DSC) is a new type of solar cell by using photocatalytic properties of $TiO_2$. The electric potential distribution in DSCs has played a major role in the operation of such cells. $TiO_2$ thin films were deposited on the ITO substrate by Nd:YAG Pulsed Laser Deposition(PLD) at room temperature and post-deposition annealing at $500^{\circ}C$ in flowing $O_2$ atmosphere for 1hour. The structural properties of $TiO_2$ thin films have investigated by X-ray diffraction(XRD). We manufactured DSC unit cells then I-V and efficiency were tested by solar simulator.

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GaN 단결정에 의해 제조된 $Ga_2O_3$ 나노물질의 구조 (The structure of $Ga_2O_3$ nanomaterials synthesized by the GaN single crystal)

  • 박상언;조채룡;김종필;정세영
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.120-120
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    • 2003
  • The metallic oxide nanomaterials including ZnO, Ga$_2$O$_3$, TiO$_2$, and SnO$_2$ have been synthesized by a number of methods including laser ablation, arc discharge, thermal annealing procedure, catalytic growth processes, and vapor transport. We have been interested in preparing the nanomaterials of Ga$_2$O$_3$, which is a wide band gap semiconductor (E$_{g}$ =4.9 eV) and used as insulating oxide layer for all gallium-based semiconductor. Ga$_2$O$_3$ is stable at high temperature and a transparent oxide, which has potential application in optoelectronic devices. The Ga$_2$O$_3$ nanoparticles and nanobelts were produced using GaN single crystals, which were grown by flux method inside SUS$^{TM}$ cell using a Na flux and exhibit plate-like morphologies with 4 ~ 5 mm in size. In these experiments, the conventional electric furnace was used. GaN single crystals were pulverized in form of powder for the growth of Ga$_2$O$_3$ nanomaterials. The structure, morphology and composition of the products were studied mainly by X-ray diffraction (XRD), field emission scanning electron microscopy (FESEM), and high-resolution transmission electron microscopy (HRTEM).).

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증착 온도와 후열처리에 따른 $Mg_xZn_{1-x}O$ 박막의 특성 연구 (Variation of the properties of $Mg_xZn_{1-x}O$ films depending on deposition temperature and post annealing treatment)

  • 김재원;강홍성;김종훈;이상렬
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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    • pp.579-582
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    • 2004
  • [ $Mg_xZn_{1-x}O$ ] thin films on (001) sapphire substrates have been deposited by pulsed laser deposition (PLD). The substrate temperature has been varied from $200^{\circ}C$ to $600^{\circ}C$ in order to control Mg content in $Mg_xZn_{1-x}O$ thin film. $Mg_xZn_{1-x}O$ thin films deposited at 200, 400 and $600^{\circ}C$ were annealed at temperatures of $800^{\circ}C$. The ratio of Mg was mesured by Rutherford backscattering spectrometry. The optical properties of $Mg_xZn_{1-x}O$ thin films were characterized by photomulinesence. The ratio of Mg was varied depending on the deposition temperatures which resulted in the change of energy bandgap.

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IDC 패턴에 따른 BST 전기적 특성 (Electrical Characterization of BST Thin Film by IDC pattern)

  • 노지형;김성수;송상우;김지홍;고중혁;문병무
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.200-200
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    • 2008
  • This paper reports on electrical characterization by IDC pattern using BST$(Ba_{0.5}Sr_{0.5}TiO_3)$ thin film. BST thin films have been deposited on $Al_2O_3$ Substrates by Nd-YAG pulsed laser deposition with a 355nm wavelength at $700^{\circ}C$. The post deposition annealing at $750^{\circ}C$ in flowing $O_2$ atmosphere for I hours. The capacitance of IDC patterns have been measured from 1 to 10 GHz as a function fo electric field (${\pm}40$ KV/cm) at room temperature using interdiigitated Au electrodes deposited on top of BST. The IDC patterns have three type of fingers number. For the finger paris was increased onto $Al_2O_3$, the capacitance increased. The capacitance of 5 pairs finger was 0.3pF and 10 pairs finger was 0.9pF.

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New fabrication methods of step-edge Josephson junctions on SrTiO$_3$, MgO, LaAlO$_3$ single crystal substrates for YBa$_2$Cu$_3$O$_7$ thin films by using ion milling technique

  • Moon, Sunk-Yung;Ahn, Jong-Rok;Hwang, Yun-Seok;Lee, Soon-Gul;Choi, Hee-Seok;Kim, Jin-Tae
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 2000년도 High Temperature Superconductivity Vol.X
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    • pp.146-150
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    • 2000
  • Two methods have been investigated to fabricate good quality step-edge Josephson junctions on STO, MgO, and LAO single crystal substrates. One is the annealing of substrates at 1050$^{\circ}$C in 1 atmospheric oxygen after Ar-ion milling. The other is the cleaning of step-edge by using Ar ion milling. The step-edge is characterized with atomic force microscope (AFM) images. And YBCO thin films are deposited by using pulsed laser. The I-V properties of step-edge junctions are characterized. The yield rate of step-edge junction is increased by new fabrication methods.

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2-step 공정법에 의해 상온 증착된 ITO박막의 전기 광학적 특성 향상 (Enhancement in electrical and optical properties of ITO thin films grown by 2-step process at room temperature)

  • 김종훈;안병두;전경아;강홍성;이상렬
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.6-8
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    • 2005
  • The optical and electrical properties of indium tin oxide (ITO) thin films deposited at room temperature can be substantially enhanced by adopting a two-step process. In the first step, the films (50 nm thick) were grown by pulsed laser deposition (PLD) on glass substrate at room temperature and quickly annealed at $400^{\circ}C$ in nitrogen ambient for 1 minute by using rapid thermal annealing method. The process was completed by additional deposition (150 nm thick) on annealed film at room temperature. High quality ITO films grown by two-step process at room temperature could be obtained with the resistivity of $3.02{\times}10^{-4}{\Omega}cm$, the carrier mobility of 32.07 $cm^2/Vs$, and the transparency above 90 % in visible region mainly due to the enhancement of the film crystallinity and the increase of grain size.

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다층 구조를 이용한 Phosphorus 도핑된 ZnO 박막 제작 (Fabrication of phosphorus doped ZnO thin film using multi-layer structure)

  • 강홍성;임성훈;장현우;김건희;김종훈;이상렬
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.27-29
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    • 2005
  • ZnO and phosphorus doped ZnO thin films (ZnO:P) are deposited by pulsed laser deposition grown on (001) $Al_{2}O_{3}$. ZnO/ZnO:P/ZnO/$Al_{2}O_{3}$ (multi-layer) structure was used for phosphorus doped ZnO fabrication. This multi-layer structure thin film was annealed at $400^{\circ}C$ for 40 min. The electron concentration of that was changed from $10^{19}$ to $10^{16}/cm^{-3}$ after annealing. ZnO thin films with encapsulated structure showed the enhanced structural and optical properties than phosphorus doped ZnO without encapsulated layer. In this study, encapsulated ZnO structure was suggested to enhance electrical, structural and optical properties of phosphorus doped ZnO thin film and it was identified that encapsulated structure could be used to fabricate high quality phosphorus doped ZnO thin film.

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레이저 결정화 다결정 실리콘 기판에서의 게이트 산화막두께에 따른 1T-DRAM의 전기적 특성

  • 장현준;김민수;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2010년도 제39회 하계학술대회 초록집
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    • pp.201-201
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    • 2010
  • DRAM (dynamic random access memory)은 하나의 트랜지스터와 하나의 캐패시터의 구조 (1T/1C)를 가지는 구조로써 빠른 동작 속도와 고집적에 용이하다. 하지만 고집적화를 위해서는 최소한의 캐패시터 용량 (30 fF/cell)을 충족시켜 주어야 한다. 이에 따라 캐패시터는 stack 혹은 deep trench 구조로 제작되어야 한다. 위와 같은 구조로 소자를 구현할 시 제작공정이 복잡해지고 캐패시터의 집적화에도 한계가 있다. 이러한 문제점을 보완하기 위해 1T-DRAM이 제안되었다. 1T-DRAM은 하나의 트랜지스터로 이루어져 있으며 SOI (silicon-on-insulator) 기판에서 나타나는 floating body effect를 이용하여 추가적인 캐패시터를 필요로 하지 않는다. 하지만 SOI 기판을 이용한 1T-DRAM은 비용측면에서 대량생산화를 시키기는데 어려움이 있으며, 3차원 적층구조로의 적용이 어렵다. 하지만 다결정 실리콘을 이용한 기판은 공정의 대면적화가 가능하고 비용적 측면에서 유리한 장점을 가지고 있으며, 적층구조로의 적용 또한 용이하다. 본 연구에서는 ELA (eximer laser annealing) 방법을 이용하여 비정질 실리콘을 결정화시킨 기판에서 1T-DRAM을 제작하였다. 하지만 다결정 실리콘은 단결정 실리콘에 비해 저항이 크기 때문에, 메모리 소자로서 동작하기 위해서는 높은 바이어스 조건이 필요하다. 게이트 산화막이 얇은 경우, 게이트 산화막의 열화로 인하여 소자의 오작동이 일어나게 되고 게이트 산화막이 두꺼울 경우에는 전력소모가 커지게 된다. 그러므로 메모리 소자로서 동작 할 수 있는 최적화된 게이트 산화막 두께가 필요하다. 제작된 소자는 KrF-248 nm 레이저로 결정화된 ELA 기판위에 게이트 산화막을 10 nm, 20 nm, 30 nm 로 나누어서 증착하여, 전기적 특성 및 메모리 특성을 평가하였다.

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