• Proceedings of the KIEE Conference
• /
• 1995.07c
• /
• pp.1434-1436
• /
• 1995

We designed and fabricated a highly sensitive magnetotransistor which employes the emitter region as a Hall plate for inducing Hall voltage across the emitter. The Hall voltage modulates the emitter basic junction bias on both sides of the emitter so that a large collector current difference is resulted. The specially designed $p^+$ ring around the emitter enhances accumulation of drifted electrons in the emitter and thus the Hall voltage. A relative sensitivity of 240/tesla is measured by operating the device in the saturation mode.

• Proceedings of the KSR Conference
• /
• 2011.10a
• /
• pp.287-296
• /
• 2011

Turnout is a mechanical installation enabling railway trains to be guided from one track to another at a railway junction. A movable nose crossing frog is a device used at a railway turnout to eliminate the gap at the common crossing (High manganese, block, assembly crossing)which can cause impact damage, noise and vibration. Our government has a plan speed up of conventional line to 250km/h semi-high speed. We had already developed flexible turnout with fixed crossing(High manganese) and SFC fastening system can cover in the semi-high speed line In this study is about development of the movable nose crossing turnout available Semi-high speed line on concrete track. This paper describes about geometry, attack angle, bending stress at the nose, switching force, safety of continuous welded long rails. This movable nose crossing turnout is expected greatly increases passing speed of turnout in national railway.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.28 no.6
• /
• pp.371-374
• /
• 2015

This paper suggests a high performance lateral super barrier rectifier (Lateral SBR) device which has the advantages of both Schottky diode and pn junction, that is, low forward voltage and low leakage current, respectively. Advantage of the proposed lateral SBR is that it can be easily implemented and integrated in current BCD platform. As a result of simulation using TCAD, BVdss = 48 V, $V_F=0.38V$ @ $I_F=35mA$, T_j = $150^{\circ}C$ were obtained with very low leakage current characteristic of 3.25 uA.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2004.08a
• /
• pp.1258-1261
• /
• 2004

Degradation phenomenon in the low-temperature polysilicon (LTPS) thin-film transistors (TFTs) with different junction structures was investigated. A gate-overlapped lightly doped drain (GOLDD) structure showed better hot-carrier stress (HCS) stability than a conventional LDD one. On the other hand, high drain current stress (HDCS) at $V_{gs}$ = $V_{ds}$ conditions caused much severe device degradation in the GOLDD structure because of its higher current level resulting in the higher applied power. It is suggested that self-heating-induced mobility degradation in the GOLDD TFFs be suppressed for using this structure in short-channel devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.05b
• /
• pp.24-26
• /
• 2002

In this paper, we discuss the electrical properties of self-assembled (2'-amino-4,4-di(ethynylphenyl)-5'-nitro-l-(thioacetyl)benzene), which has been well known as a conducting molecule having possible application to molecular level NDR device. The phenomenon of negative differential resistance (NDR) is characterized by decreasing current through a junction at increasing voltage. also fabrication of MIM-type molecular electronic and the Molecular Level Using Scanning Tunneling Microscopy

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1995.05a
• /
• pp.227-229
• /
• 1995

Using thermal oxide SiO$_2$ as a dielectrical isolation layer, SOI Hall sensors without pn junction isolation have been fabricated on Si/SiO$_2$/Si structures. The SOI structure was formed by SDB (Si- wafer direct bonding) technology. The Hall voltage and the sensitivity of Si Hall devices implemented on the SDB SOI structure show good linearity with respect to the appled magnetic flux density and supplied current. The product sensitivity of the SDB SOI Hall device is average 600V/V.T. In the trmperature range of 25 to 300$^{\circ}C$, the shifts of TCO(Temperature Coefficient of the Offset Voltage) and TCS(Temperature Coefficient of the Product Sensitivity) are less than ${\pm}$ 6.7x10$\^$-3/ C and ${\pm}$8.2x10$\^$04/$^{\circ}C$, respectively. These results indicate that the SDB SOI structure has potential for the development of Hall sensors with a high-sensitivity and high-temperature operation.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.565-568
• /
• 1998

The effects of denudation anneals on the properties of 256Mega-bit level devices were investigated. Based on the three-step anneal model, the redistribution of oxygen atom and the defect free zone depth were calculated. A significant outdiffusion of oxygen atoms is occurred during the denudation anneals at high temperature. Junction leakage current of P+/N-Well and N+/P-Well junctions, as a function of denudation anneal temperature, was decreased with increase of anneal temperature and is closely related with the behaviors of oxygen atoms. Also it is found that the denudation anneal at high temperature very effective for the fabrication of reliable 256Mega-bit level devices.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.35D no.8
• /
• pp.38-43
• /
• 1998

An analytical model for the surface field distribution of the RESURF (reduced surface field)LD(lateral double-diffused) MOS is presented in terms of the doping concentration, the thickness of the n epi layer, the p substrate concentration, and the epi layer length. The reuslts are used to determine the breakdown voltage due to the surface field as a function of the epi layer length. The maximum breakdown voltage of the device is found to be that of the vertical n$^{+}$n$^{[-10]}$ p$^{[-10]}$ junction. Analytical results of the breakdown voltage vs. the epi layer length agree well with the numerical simulation results using MEDICI.I.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.6
• /
• pp.1178-1182
• /
• 2011

The best methods for distribution controled of LED lighting fixtures is control to designed LED chip array, lens and reflector. However, lens design need distribution design to reflector for low-wattage LED lighting because of difficulty of production and reduction of light efficiency. In addition, it needs maximize of thermal performance to improve the efficiency and reliability of device. As a result, for the height of reflector 40[mm] and Inclination 25[$^{\circ}$], we can see the best distribution properties, and, in the thermal properties, junction temperature MCPCB 62.9 [$^{\circ}C$], FR4 PCB 89.6 [$^{\circ}C$], FR4 PCB from Via-hole is 63.1 [$^{\circ}C$]. it may improve for thermal properties for makes the Via-hole.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
• /
• 2000.11a
• /
• pp.17-20
• /
• 2000

This study is about a retrograde triple well employed in the Cell tr. of next DRAM and flash memory. triple well structure is formed deep n-well under the light p-well using MeV ion implantation. MeV P implanted deep n-well was observed to show greatly improved characteristics of electrical isolation and soft error. Junction leakage current, however, showed a critical behavior as a function of implantation and annealing conditions. {311} defects were observed to be responsible for the leakage current. {311} defects were generated near the R$\sub$p/ (projected range) region and grown upward to the surface during annealing. This is study on the defect behavior in device region as a function of implantation and annealing conditions.