• Journal of information and communication convergence engineering
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• v.11 no.1
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• pp.50-55
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• 2013

In this paper, we propose a parallel intra-operation unit and a memory architecture for improving the performance of intra-prediction, which utilizes spatial correlation in an image to predict the blocks and contains 17 prediction modes in total. The design is targeted for portable devices applying H.264/AVC decoders. For boosting the performance of the proposed design, we adopt a parallel intra-operation unit that can achieve the prediction of 16 neighboring pixels at the same time. In the best case, it can achieve the computation of one luma $16{\times}16$ block within 16 cycles. For one luma $4{\times}4$ block, a mere one cycle is needed to finish the process of computation. Compared with the previous designs, the average cycle reduction rate is 78.01%, and the gate count is slightly reduced. The design is synthesized with the MagnaChip $0.18{mu}m$ library and can run at 125 MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.767-773
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• 2017

In this paper, we propose a design of Intra prediction angular mode decision for HEVC encoder. Intra prediction coding of HEVC is a method for predicting a current block by referring to samples reconstructed around a current block. Intra prediction supports a total of 35 modes with 1 DC mode, 1 Planar mode, and 33 Angular modes. Intra prediction coding of HEVC works by performing all 35 modes for efficient encoding. However, in order to process all of the 35 modes, the computational complexity and operational time required are high. Therefore, this paper proposes comparing the difference in the value of the original pixel, using an algorithm that determines angular mode efficiently. This new algorithm reduces the Hardware size. The hardware which is proposed was designed using Verilog HDL and was implemented in 65nm technology. Its gate count is 14.9K and operating speed is 2GHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.145-148
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• 2016

In this paper, we propose a design of Intra Prediction angular mode decision for high-performance HEVC encoder. Intra Prediction works by performing all 35 modes for efficient encoding. However, in order to process all of the 35 modes, the computational complexity and operational time required are high. Therefore, this paper proposes comparing the difference in the value of the original image pixel, using an algorithm that determines Angular mode efficiently. This new algorithm reduces the Hardware size. The hardware which is proposed was designed using Verilog HDL and was implemented in 65nm technology. Its gate count is 14.9k and operating speed is 2GHz.

• Journal of Broadcast Engineering
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• v.21 no.4
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• pp.484-492
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• 2016

The High efficiency video coding (HEVC) is the newest video coding standard that achieves coding efficiency higher than previous video coding standards such as H.264/AVC. In intra prediction, the prediction units (PUs) are derived from a large coding unit (LCU) which is partitioned into smaller coding units (CUs) sizing from 8x8 to 64x64 in a quad-tree structure. As they are divided until having the minimum depth, Optimum CU splitting is selected in RDO (Rate Distortion Optimization) process. In this process, HEVC demands high computational complexity. In this paper, to reduce the complexity of HEVC, we propose a fast CU mode decision (FCDD) for intra prediction by using FAST (Features from Accelerated Segment Test) corner detection. The proposed method reduces computational complexity with 53.73% of the computational time for the intra prediction while coding performance degradation with 0.7% BDBR is small compared to conventional HEVC.

• Journal of Korea Multimedia Society
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• v.17 no.5
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• pp.623-630
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• 2014

While BIM software becomes popular for CAAD and architectural design educations, the affordance of BIM for students' architectural idea developments, called intra-process of communication, is still unknown. Therefore, this study conducted t-test quantitative analysis in order to the scores for feedback, idea productivity, idea development for architectural elements(form, interior space, material, and details), and creative motivation(novelty, appropriateness) using BIM and non-BIM 3D modeler. To achieve the goal, in authentic CAAD class, architecture major students proposed two office designs using those two tools, then they evaluated in which ways those tools influenced their idea developments.

• Journal of Broadcast Engineering
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• v.21 no.3
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• pp.341-348
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• 2016

HEVC is the next compression standard and is expected to be used widely replacing the conventional H.264/AVC standard. The compression ratio of the HEVC is twice times than H.264/AVC, whereas its computational complexity is increased by up to 40%. Many research efforts have been made to reduce the computational complexity and to speed up encoding. For intra coding, the rough mode decision (RMD) is commonly applied. The rate-distortion optimization (RDO) process to decide the best mode is too complex so that RMD chooses the candidate modes with a simple process and sends the candidates to RDO process. However, for large-size blocks, the RMD also requires considerable computations. In this paper, a down-sampling scheme is proposed for the RMD process. The reference pixel loading, predicted pixel generation are performed using the down-sampled pixel data. When the proposed scheme is applied to the RMD, the computational complexity is reduced by 70% with a marginal bitrate increase of 0.04%. In terms of area of hardware-based RMD, the gate count and the buffer size is reduced 33% and 66%, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2045-2049
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• 2008

In this paper, we propose an novel architecture for H.264 High Profile Encoder Intra Prediction module. This designed module can be operated in 306 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 13.2 and verified the our developed hardware using test vector generated by reference C. We adopt plan removal and SAD calculation to reduce the Hardware cost and cycle. The designed circuit can be operated in 133MHz clock system, and has 250K gate counts using TSMC 0.18 um process including SRAM memory.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.233-242
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• 2009

This paper intend to show the affect of the intra-prediction on the typical digital watermarking method and the fact that the watermarking method has very low effectiveness when it is performed for the intra-frames of H.264. The target watermarking method was the one for imperceptibility and robustness and was assumed to be performed during the intra-compression process by the H.264 technique. Also this method was assumed to insert watermark data and to extract it for certification if needed. The problem is that the resulting data from the re-engineering of the watermark insertion process to extract the watermark data is different from the one before. We experimentally showed that it stems from the intra-prediction itself. That is, we showed that the resulting image data from only compression without watermarking changes if it is re-compressed by the same conditions as the first compression and it is because the intra-prediction modes as well as the coefficient values change. Also, we applied one blind and one semi-blind watermarking methods to show that the typical attacks after watermarking makes this problem much more serious and lowers the effectiveness of the watermarking method dramatically. Therefore we concluded by considering the experimental data that a typical watermarking method which has been researched so far cannot guarantee the effectiveness of intra-frame watermarking and it is highly required to developed a new kind of methodologies.

• Journal of Engineering Education Research
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• v.18 no.3
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• pp.46-58
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• 2015

Informal engineering education program for high school students was developed to cultivate engineering literacy using the human resources and facilities of university. Plant factory, a smart farming technology, was selected as a main theme, and the novel engineering camp program involving engineering design activities and intra-linter-team works was planned. The camp program was applied to 38 high school students in an active learning classroom. Five teams were constructed according to elemental technologies such as biotechnology, information-communication technology, energy engineering, mechanical engineering and architectural engineering, and the students were participated in intra- and inter-team activities to achieve the final goal of 'the construction of a plant factory in school'. The team works were conducted according to the eight steps of engineering design process (identifying the problem and need, identifying criteria and constraints, brainstorming possible solutions, selecting the best possible solution, constructing a prototype, testing and evaluating the solution, communicating the solution, and refining design). Participants' satisfaction survey showed that the satisfaction on the contents of engineering design was 4.48 on 5-point Likert scale. The participants' satisfaction on creative activity and systematic methodology was 4.43 on 5-point Likert scale. 97% of participants responded positively to team works, and 92% of participants were satisfied with career mentoring activity supplied by undergraduate/graduate students. These results indicates that the engineering camp program involving engineering design activity and intra-/inter-team works can contribute to cultivate engineering literacy such as creativity, problem solving ability, collaboration, communication skills for high school students, and to increase their interests in engineering fields.

• International journal of advanced smart convergence
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• v.8 no.4
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• pp.75-81
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• 2019

Though recent advancement of deep learning methods have provided satisfactory results from large data domain, somehow yield poor performance on few-shot classification tasks. In order to train a model with strong performance, i.e. deep convolutional neural network, it depends heavily on huge dataset and the labeled classes of the dataset can be extremely humongous. The cost of human annotation and scarcity of the data among the classes have drastically limited the capability of current image classification model. On the contrary, humans are excellent in terms of learning or recognizing new unseen classes with merely small set of labeled examples. Few-shot learning aims to train a classification model with limited labeled samples to recognize new classes that have neverseen during training process. In this paper, we increase the backbone depth of the embedding network in orderto learn the variation between the intra-class. By increasing the network depth of the embedding module, we are able to achieve competitive performance due to the minimized intra-class variation.