• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.367-368
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• 2017

본 논문에서는 영전류 모드로 진입한 zero voltage transition(ZVT) interleaved bi-direction low voltage DC-DC converter(IB-LDC)의 도통 손실을 최소화하기 위한 위상 제어가 제안된다. IB-LDC의 출력단 배터리가 완충되어 영전류 모드로 진입하면 IB-LDC의 입 출력 평균 전류는 0[A]로 감소하지만 보조 회로 전류는 기존의 설계 값에 의해 감소하지 않아 지속적인 도통 손실을 일으킨다. 따라서 본 논문에서는 영전류 모드로 진입한 IB-LDC의 보조 회로에 ZVT 조건을 만족시키는 공진 전류만 흐르도록 하여 도통 손실을 최소화하는 위상 제어를 제안하였다. 또한 PSIM simulation 및 실험을 통해 증명하였다.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1632-1642
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• 2014

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.153-155
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• 2019

This paper proposes a two-phase interleaved bridgeless single-stage ac-dc converter with magnetic integration that can achieve CCM power factor correction without input current sensing. All switches achieve ZVS turn-on and all diodes achieve ZCS turn-on for the whole grid cycle. SDAB-based modulation strategy is applied which results in simple power control and wide range output voltage. A flux cancellation method to integrate the interleaved transformer is firstly proposed in this paper to reduce the core size and loss. Experimental results on a 1.7-kW, 50kHz prototype are given to verify the principle and advantages of the proposed ac-dc converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.3
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• pp.260-266
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• 2016

A new method for the current ripple reduction of a three-phase interleaved bidirectional DC-DC converter is proposed. The converter used in this study operates in discontinuous mode to minimize the switching losses. All the switches are turned on at ZVS and ZCS conditions, and turned off at ZVS condition. The charging and discharging power of the battery is controlled by varying the switching frequency while maintaining the discontinuous mode operation. A 3 kW 20 kHz power converter is designed and implemented. Simulation and experimental results show the validity of the proposed method. The proposed control method can be used to reduce the battery ripple current significantly.

• Journal of Power Electronics
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• v.12 no.3
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.192-194
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• 2018

In this paper a new single-stage ac-dc converter with high frequency isolation and low components count is introduced. The proposed converter is constructed using two interleaved boost circuits in the grid side and non-regulating full bridge in the DC side. An optimized switching is implemented on the two interleaved boost circuits resulting in a ripple-free grid current without a ripple cancellation network; hence very small filter inductors are used. A simple and reliable closed-loop control system is easily implemented, since the phase-shift angle is the only independent variable. Moreover, current imbalance is avoided in the presented topology without current control loop in each phase. The proposed charger charges the battery with a sinusoidal-like current instead of a constant direct current. ZVS turn on of all switches is achieved throughout the operation in both directions of power flow without any additional components.

• Journal of Power Electronics
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• v.18 no.1
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• pp.23-33
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• 2018

Silicon Carbide (SiC) MOSFET belongs to the family of wide-band gap devices with inherit property of low switching and conduction losses. The stable operation of SiC MOSFET at higher operating temperatures has invoked the interest of researchers in terms of its application to high power density (HPD) power converters. This paper presents a performance study of SiC MOSFET based two-phase interleaved boost converter (IBC) for regulation of avionics bus voltage in more electric aircraft (MEA). A 450W HPD, IBC has been developed for study, which delivers 28V output voltage when supplied by 24V battery. A gate driver design for SiC MOSFET is presented which ensures the operation of converter at 250kHz switching frequency, reduces the miller current and gate signal ringing. The peak current mode control (PCMC) has been employed for load voltage regulation. The efficiency of SiC MOSFET based IBC converter is compared against Si counterpart. Experimentally obtained efficiency results are presented to show that SiC MOSFET is the device of choice under a heavy load and high switching frequency operation.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1069-1070
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• 2008

This paper presents a high efficient two-stage interleaved synchronous buck CMOS DC-DC converter. The proposed circuit has a fixed duty cycle as 0.5 by an added buck converter. And it causes the best ripple cancelation of the output current ripple. The proposed circuit was simulated by HSPICE with a standard CMOS $0.35{\mu}m$ process parameter.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.4
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• pp.443-448
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• 2014

Soft errors in memory devices that caused by radiation are the main threat from a reliability point of view. This threat can be commonly overcome with the combination of SEC (Single-Error Correction) codes and scrubbing technique. The interleaving architecture can give memory devices the ability of tolerating these soft errors, especially against multiple-bit soft errors. And the interleaving distance plays a key role in building the tolerance against multiple-bit soft errors. This paper proposes a reliability model of an interleaved memory device which suffers from multiple-bit soft errors and are protected by a combination of SEC code and scrubbing. The proposed model shows how the interleaving distance works to improve the reliability and can be used to make a decision in determining optimal scrubbing technique to meet the demands in reliability.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1735-1742
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• 2016

This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.