• 전력전자학회논문지
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• 제19권1호
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• pp.15-22
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• 2014

Recently, parallel operation of dc-dc converters has been widely used in distributed power systems. In this paper, a control method to achieve parallel operation of three-phase bi-directional isolated interleaved dc-dc converters is discussed for the battery charging and discharging system which consists of the 32 battery charger/dischargers and two three-phase bi-directional isolated interleaved dc-dc converters. In the boost mode, the battery energy is delivered to the grid, whereas the grid energy is transferred to the battery in the buck mode operation. The average current sharing control method is employed to obtain an equal conducting of each phase current in the three-phase dc-dc converter. By using the proposed method, the imbalance factor is gratefully reduced from 8 percent to 1 percent. Two 2.5kW three-phase bi-directional dc-dc converter prototype have been built and the proposed method has been verified through experiments.

• Journal of Electrical Engineering and Technology
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• 제11권4호
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• pp.905-914
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• 2016

This paper proposes a new phase current reconstruction technique for interleaved three-phase bidirectional dc-dc converters using a single current sensor. In the proposed current reconstruction algorithm, a single current sensor is employed at the dc-link, and the dc-link current information is sampled at either the peak or valley point of the pulse-width modulation (PWM) carriers regularly. From the obtained current information, all phase currents are reconstructed in a single PWM cycle. After that, the digital current controller is applied to achieve current balancing in each phase. Compare to the previous multiple current sensor method, the proposed strategy reduces the number of the current sensors in the interleaved three-phase bidirectional converter as well as reducing potential current sensing error caused by non-ideal characteristics of the multiple current sensors. The effectiveness of the proposed method is verified from the experiments based on a 3kW three-phase bidirectional converter prototype for the automotive battery charging application.

• Journal of Electrical Engineering and information Science
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• 제3권3호
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• pp.366-372
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• 1998

A high efficiency interleaved active clamp forward converter with self driven synchronous rectifiers for a modular power processor is presented. To simplify the gate drive circuits, N-P MOSFETs coupled active clamp method is used. An efficiency about 90% for the load range of 50-100% is achieved. The details of design for the power stage and current mode control circuit are provided, and also some experimental results are given.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.1386-1389
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• 2002

We consider interleaved buck converters using a switching rule based on Winner-Take-All (ab. WTA) nonlinearity. We clarify that this system exhibits various bifurcation phenomena. We also show that the switching phase of each converter is controlled by the WTA. Using a simple test circuit, ripple reduction and typical phenomena are verified in the laboratory.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.48-49
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• 2016

Interleaved 컨버터의 경우 전류 리플을 줄여 출력 필터의 사이즈를 줄이기 위해 많이 사용된다. 하지만 모듈간 소자값의 편차가 발생할 경우 전류 불평형을 초래하게 되며, 이는 리플저감효과를 감소시키거나 방열문제, 노화촉진, 그리고 오동작을 일으킬 가능성을 높이게 한다. 특히 공진형 컨버터의 경우 주파수 제어를 시도하기 때문에 Interleaving 기법을 적용하여 효용성을 얻기에는 제약이 많다. 본 논문에서는 이러한 소자값의 불일치로 인한 전류 불평형 문제를 해결하기 위해 위상천이변조 제어를 제안한다. 동작원리와 시스템에 대한 분석을 제시하고, 모의실험을 통해 타당성을 검증한다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 추계학술대회 논문집
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• pp.21-23
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• 2007

In this paper a high efficiency bi-directional DC-DC converter for hybrid vehicles is proposed. The proposed converter a three-phase half-bridge interleaved ZVS converter, is designed to have high efficiency in the main operation range. The component ratings are calculated, the actual devices are selected, and the efficiency analysis has been performed to determine optimal ZVS range. The input and output current ripples are significantly reduced due to the interleaved operation. The dual loop control for the interleaved three-phase converter is also presented. To confirm the proposed convert ter, The simulation and experimental results are presented.

• 전기학회논문지P
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• 제65권4호
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• pp.303-308
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• 2016

A light-emitting diode (LED) has been increasingly applied to various industrial fields and general lightings because of its high efficiency, low power consumption, environment-friendly characteristic and long lifetime. To drive this LED lighting, various types of power converters have been applied. Also, power factor correction (PFC) techniques play an important role in the power supply technology. In this paper, design and control of a DCM interleaved boost PFC converter is discussed. The proposed converter can reduce current ripples at input and output side by cancelling an each phase of inductor currents. Since the IC does not require the auxiliary winding of inductor for current detection, simple PFC circuit is achieved. Therefore, it contributes to increase efficiency and downsize the whole system volume, cost. Also, the performance of the proposed system is demonstrated through experiments.

• Journal of Power Electronics
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• 제12권2호
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• 디지털산업정보학회논문지
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• 제13권3호
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• pp.35-42
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• 2017

This paper presents hardware implementation of background timing-skew calibration technique for time-interleaved analog-to-digital converters (TI ADCs). The timing skew between any two adjacent analog-digital (A/D) channels is detected by using pure digital Finite Impulse Response (FIR) delay filter. This paper includes hardware architecture of the system, main units and small sub-blocks along with control logic circuits. Moreover, timing diagrams of logic simulations using ModelSim are provided and discussed for further understanding about simulations. Simulation process in MATLAB and Verilog is also included and provided with basic settings need to be done. For hardware implementation it not practical to work with all samples. Hence, the simulation is conducted on 512 TI ADC output samples which are stored in the buffer simultaneously and the correction arithmetic is done on those samples according to the time skew algorithm. Through the simulated results, we verified the implemented hardware is working well.

• Journal of international Conference on Electrical Machines and Systems
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• 제3권1호
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• pp.88-92
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• 2014

This paper presents an application of a multiphase interleaved converter in tracking maximum power points (MPPs) of a photovoltaic (PV) panel regardless of environmental variations. Maximum power from the panel was extracted by means of the well-known the perturb-and-observe (P&O) method. The switching control technique used an interleaving scheme based on multi-unit synchronization. The converter performed harmonic attenuation without affecting the tracking speed. This approach is straightforward, reliable and inexpensive, and could be applied to any higher number of switching cells without difficulty.