• 제목/요약/키워드: Interference Diagram

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On the Likelihood of Peace and War on the Korean Peninsula: A Causal Loop Analysis

  • 김강훈
    • 한국시스템다이내믹스연구
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    • 제10권4호
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    • pp.5-25
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    • 2009
  • Since the end of the 1950-1953 Korean War, many scholars and policymakers have expressed concern about the possibility of another conflict on the peninsula. In certain respects, the post-1953 North-South Korea relationship resembles the Cold War that existed between the United States and the Soviet Union, 1945-1990. Although a "hot" never occurred, peace was never guaranteed. By looking at international theories (i.e., realism and liberal theory) and by utilizing casual-loop diagram analysis, the main purpose of this research is to explore on the likelihood of peace and war on the Korean peninsula. First, several factors (e.g., economic stagnation of North Korea, unstable political systems, and so on) emphasized by realism perspectives are significantly related to the likelihood of conflict between North and South Korea. Conversely, several determinants (e.g., economic assistance to North Korea, inter-dialogue between two Koreas, cultural and social exchange, and so on) emphasized by liberal approaches are significantly related to likelihood of peace on the Korean peninsula. Given the two different interpretations about the likelihood of conflict or peace, it can be argued that a second military action might occur on the Korean peninsula if realism theories are true. However, if practical factors exist on the Korean peninsula, the two Korean can optimistically expect a peaceful reunification in the future, without interference from other countries.

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Pulse-Width Modulation Strategy for Common Mode Voltage Elimination with Reduced Common Mode Voltage Spikes in Multilevel Inverters with Extension to Over-Modulation Mode

  • Pham, Khoa-Dang;Nguyen, Nho-Van
    • Journal of Power Electronics
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    • 제19권3호
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    • pp.727-743
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    • 2019
  • This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

2단 적응 등화기의 직렬 연결에 의한 MMA 알고리즘의 수렴 속도 개선 (Convergence Speed Improvement in MMA Algorithm by Serial Connection of Two Stage Adaptive Equalizer)

  • 임승각
    • 한국인터넷방송통신학회논문지
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    • 제15권3호
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    • pp.99-105
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    • 2015
  • 본 논문에서는 nonconstant modulus 신호를 대상으로 채널의 찌그러짐에 의한 부호간 간섭을 보상하기 위한 MMA (Multiple Modulus Algorithm) 적응 등화기를 가변 적응 스텝 크기를 적용하지 않고 2단의 직렬 연결 형태로 구현하여 수렴 속도를 개선할 수 있는 mMMA (modified MMA)에 대하여 다룬다. 적응 등화기는 유한 차수의 탭 지연선에 의한 단일 디지털 필터로 구현되므로, 논문에서는 이를 2단의 직렬 연결 필터로 구현한 후 각 단에서는 MMA와 동일한 알고리즘으로 오차 신호를 얻은 후 필터 계수를 갱신하게 된다. 따라서 첫단에는 빠른 수렴 속도를 결정하며, 두 번째단에서는 첫단의 출력에 포함되어 있는 잔류 isi양을 최소화시키도록 탭 계수를 갱신한다. 이때 1단 시스템과 2단 시스템은 동일한 차수의 필터가 되도록 조정하면서 적응 등화 성능을 비교하였으며, 성능 비교를 위한 지수로는 등화기 출력 신호 성상도, 수렴 특성을 나타내는 잔류 isi, 최대 찌그러짐과 MSE, 채널의 신호대 잡음비에 따른 SER을 사용하였다. 시뮬레이션 결과 2단의 FIR 구조를 갖는 mMMA가 1단의 기존 MMA보다 등화 잡음에 의한 성상도를 제외한 모든 성능 지수에서 우월하며, 수렴 속도는 1.5~1.8배 정도 개선됨을 확인하였다.