• 대한전자공학회논문지
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• 제25권12호
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• pp.1582-1585
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• 1988

A cavity perturbation technique is employed to determine the dielectric property of thin samples. Substrates in microwave integrated circuits are fabricated in sheet form and are expected to have a dielectric constant less than 10 and a dielectric loss better than 10**-3. This research aimed to determine both dielectric constant and dielectric loss with good accuracy. The tecynique makes use of thin circular disk samples placed in a right circular cylindrical cavity. The accuracy of measurements is within \ulcorner% for dielectric constnat and 3x10**-4 for dielectric loss.

• KIEE International Transactions on Electrophysics and Applications
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• 제4C권6호
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• pp.255-262
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• 2004

In this paper, a number of double-layered microwave integrated circuits (MIC) have been designed and analyzed based on a developed finite-difference time-domain (FDTD) solver. The solver was first validated through comparisons of the computed results with those previously published throughout the literature. Subsequently, various double-layered MIC printed on both isotropic and anisotropic substrates and superstrates, which are frequently encountered in printed circuit boards (PCB), have been designed and analyzed. It was found that in addition to protecting circuits, the added superstrate layer can increase freedoms of design and improve circuit performance, and that the FDTD is indeed a robust and versatile tool for multilayer circuit design.

• Journal of Electrical Engineering and Technology
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• 제7권6호
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• pp.954-958
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• 2012

This paper reports a flexible patch rectenna for wireless actuation of cellulose electro-active paper actuator (EAPap). The patch rectenna consists of rectifying circuit layer and ground layer, which converts microwave to dc power so as to wirelessly supply the power to the actuator. Patch rectennas are designed with different slot length at the ground layer. The fabricated devices are characterized depending on different substrates and polarization angles. The EAPap integrated with the patch rectenna is actuated by the microwave power. Detailed fabrication, characterization and demonstration of the integrated rectenna-EAPap actuator are explained.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.292.2-292.2
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• 2013

Graphene, a two-dimensional graphite material consisting of sp2-hybridized carbons. The properties of graphene such as extremely high carrier mobility, high thermal conductivity, low resistivity, large specific make it a promising materail of divices and material. Typically, poly (methyl methacrylate) (PMMA) is used when graphene transfer to other substrates. To remove PMMA on graphene, people used to dip the graphene into the acetone. However, it is known that the remove of PMMA on the graphene is difficult to completely using the acetone. Therefore, to remove the PMMA on the graphene surface, many research groups have employed various methods such as the thermal treatment, photothermal method, and other solvent. Nevertheless, a part of PMMA still remain on graphene surface. Usually, to observe the residual PMMA on graphene surface, topography of graphene surface scanned by atomic force microscopy is used. However, in that case, we can not distinguish PMMA and other particles. In this study, to confirm the residual PMMA on graphene surface, we employed novel measurement technique which is available to distinguish PMMA and other particles by means of photothermal effect.

• Journal of electromagnetic engineering and science
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• 제8권3호
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• pp.129-133
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• 2008

An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.

• Advances in nano research
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• 제2권4호
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• pp.211-217
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• 2014

The self-assembled strain-induced sub-micrometric islands and nanostructures are grown from In-As-Sb-P quaternary liquid phase on InAs (100) substrates in Stranski-Krastanow growth mode. Two samples are under consideration. The first sample consists of unencapsulated islands and lens-shape quantum dots (QDs) grown from expressly inhomogeneous liquid phase. The second sample is an n-InAs/p-InAsSbP heterostructure with QDs embedded in the p-n junction interface. The morphology, size and shape of the structures are investigated by high-resolution scanning electron (SEM) and transmission electron (TEM) microscopy. It is shown that islands, as they decrease in size, undergo shape transitions. Particularly, as the volume decreases, the following succession of shape transitions are detected: sub-micrometric truncated pyramid, {111} facetted pyramid, {111} and partially {105} facetted pyramid, completely unfacetted "pre-pyramid", hemisphere, lens-shaped QD, which then evolves again to nano-pyramid. A critical size of $5{\pm}2nm$ for the shape transformation of InAsSbP-based lens-shaped QD to nano-pyramid is experimentally measured and theoretically evaluated.

• 대한전자공학회논문지TC
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• 제37권3호
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• pp.43-48
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• 2000

본 논문에서는 본딩와이어를 이용한 수직형 트랜스포머를 제안하고, FEM (Finite Element Method)을 이용한 완전 해석법 (Full-waye analysis)으로 20 GHz 까지 해석하였다 나선형 트랜스포머와 전기적인 특성을 비교하였고, 구해진 S-파라미터로부터 상호 인덕턴스를 추출하였다. 본딩와이어를 이용한 트랜스포머는 낮은 삽입손실을 가지며, 본딩와이어의 대부분이 손실이 없는 공기중에 위치하므로 정전용량 및 유전 손실을 줄일 수 있는 구조이다. 또한, 자동화된 와이어 본딩 장비를 이용하여 쉽게 제작할 수 있다. 본딩와이어를 이용한 트랜스포머는 Impedance matching, Phase shifting등 다양한 범위에 응용되어 MMIC의 성능 향상을 이룰 것으로 기대된다.

• 한국전자통신학회논문지
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• 제13권5호
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• pp.965-970
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• 2018

본 논문에서는 두 장의 기판을 이용하여 접힌 기판 집적형 도파관 구조의 활용을 위한 트랜지션이 제안되었고, 이러한 FSIW 구조는 간단한 대역통과 필터로 응용되었다. FSIW 구조는 SIW 구조와 유사한 특성을 가지며 도파관의 장축을 반으로 줄일 수 있다는 장점이 있다. FSIW 구조의 트랜지션은 접지에 연결된 ${\lambda}g/4$ 선로를 이용하여 설계되었고, FSIW 구조의 대역통과 필터는 5단의 타원함수 특성을 갖는 저역통과 필터를 FSIW 구조의 입출력부에 연결하여 설계하였다. 제작된 FSIW 구조의 대역통과 필터는 중심주파수 5.75 GHz, 대역폭 33.2%를 가졌고, 중심주파수에서 삽입 손실과 반사 손실은 각각 0.63dB와 19.1dB를 가졌다.

• 한국윤활학회:학술대회논문집
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• 한국윤활학회 2002년도 proceedings of the second asia international conference on tribology
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• pp.433-434
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• 2002

Chemical mechanical polishing refers to a process by which silicon and partially-processed integrated circuits (IC's) built on silicon substrates are polished to produce planar surfaces for the continued manufacturing of IC's. Chemical mechanical polishing is done by pressing the silicon wafer, face down, onto a rotating platen that is covered by a rough polyurethane pad. During rotation, the pad is flooded with a slurry that contains nanoscale particles. The pad deforms and the roughness of the surface entrains the slurry into the interface. The asperities contact the wafer and the surface is polished in a three-body abrasion process. The contact of the wafer with the 'soft' pad produces a unique elastohydrodynamic situation in which a suction force is imposed at the interface. This added force is non-uniform and can be on the order of the applied pressure on the wafer. We have measured the magnitude and spatial distribution of this suction force. This force will be described within the context of a model of the sliding of hard surfaces on soft substrates.

• 한국입자에어로졸학회지
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• 제6권3호
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• pp.131-138
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• 2010

Flexible electronics are the electronics on flexible substrates such as a plastic, fabric or paper, so that they can be folded or attached on any curved surfaces. They are currently recognized as one of the most innovating future technologies especially in the area of portable electronics. The conventional vacuum deposition and photolithographic patterning methods are well developed for inorganic microelectronics. However, flexible polymer substrates are generally chemically incompatible with resists, etchants and developers and high temperature processes used in conventional integrated circuit processing. Additionally, conventional processes are time consuming, very expensive and not environmentally friendly. Therefore, there are strong needs for new materials and a novel processing scheme to realize flexible electronics. This paper introduces current research trends for flexible electronics based on (a) nanoparticles, and (b) novel processing schemes: nanomaterial based direct patterning methods to remove any conventional vacuum deposition and photolithography processes. Among the several unique nanomaterial characteristics, dramatic melting temperature depression (Tm, 3nm particle~$150^{\circ}C$) and strong light absorption can be exploited to reduce the processing temperature and to enhance the resolution. This opens a possibility of developing a cost effective, low temperature, high resolution and environmentally friendly approach in the high performance flexible electronics fabrication area.