• 제목/요약/키워드: Integrated circuits

검색결과 749건 처리시간 0.029초

주변 전기장 측정센서를 이용한 손동작 신호 검출을 위한 신호처리시스템 연구 (Study on Signal Processing Method for Extracting Hand-Gesture Signals Using Sensors Measuring Surrounding Electric Field Disturbance)

  • 천우영;김영철
    • 스마트미디어저널
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    • 제6권2호
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    • pp.26-32
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    • 2017
  • 본 논문에서는 지구전기장 왜란신호를 전위차로 변환하는 EPIC(Electric Potential Integrated Circuit) 센서를 이용한 NUI(Natural User Interface) 기술의 요소기술인 신호검출 전자회로를 기반으로 LED 조명을 제어하는 시스템을 구현하였다. 기존에는 CIB 개발 장비를 통해서만 제한적인 형태로 이용 가능했던 신호를 모든 EPIC 센서 각각의 신호를 추출할 수 있도록 개발된 신호검출 전자회로를 이용하였다. 이렇게 추출한 신호는 이후 손동작 인식프로세스에서 특징추출 등의 과정에서 더 많은 자유도와 성능개선 효과를 보여준다. 설계되어 제작된 회로의 실제 응용시스템으로서 적용성을 검증하기 위하여 4개의 손동작으로 LED 조명의 on/off 와 밝기를 조정할 수 있는 시스템을 설계하였다. 기존의 EPIC 센서를 이용하여 명령체계를 구축하고 인터페이스 제어신호를 이용하여 보다 빠른 패턴인식 처리 속도를 얻을 수 있었다.

이차원 마이크로볼로미터 FPA를 위한 이 단계 바이어스 전류 억제 방식을 갖는 픽셀 단위의 전류 미러 신호취득 회로 (Pixel-level Current Mirroring Injection with 2-step Bias-current Suppression for 2-D Microbolometer FPAs)

  • 황치호;우두형
    • 전자공학회논문지
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    • 제52권11호
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    • pp.36-43
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    • 2015
  • 본 연구를 통해서 초점면 배열 이차원 마이크로볼로미터를 위한 픽셀 단위의 신호취득 회로를 연구하였다. 높은 응답도와 긴 적분시간을 갖는 픽셀 단위의 구조를 위해 이 단계 바이어스 전류 억제 방식을 갖는 전류 미러 입력회로를 제안하였다. 제안하는 회로는 $0.35-{\mu}m$ 2-poly 4-metal CMOS 공정을 이용하여 설계했고, 마이크로볼로미터의 배열 크기는 $320{\times}240$이며 픽셀 크기는 $50{\mu}m{\times}50{\mu}m$이다. 제안하는 이 단계 바이어스 전류 억제 방식은 넓은 보정 범위에서 충분히 작은 보정 오차를 보이며, 설계 파라미터를 조정하여 보정 범위와 보정 오차를 간단히 최적화할 수 있다. 제안하는 회로는 높은 응답도와 1 ms 이상의 긴 적분시간을 갖기 때문에 회로의 잡음등가온도차(NETD)를 26 mK까지 개선할 수 있고, 이는 기존회로의 잡음등가 온도차인 67 mK에 비해 매우 개선된 수치이다.

스마트 IT 융합 플랫폼을 위한 지능형 센서 기술 동향 (Intelligent Sensor Technology Trend for Smart IT Convergence Platform)

  • 김혜진;진한빛;염우섭;김이경;박강호
    • 전자통신동향분석
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    • 제34권5호
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    • pp.14-25
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    • 2019
  • As the Internet of Things, artificial intelligence and big data have received a lot of attention as key growth engines in the era of the fourth industrial revolution, data acquisition and utilization in mobile, automotive, robotics, manufacturing, agriculture, health care and national defense are becoming more important. Due to numerous data-based industrial changes, demand for sensor technologies is exploding, especially for intelligent sensor technologies that combine control, judgement, storage and communication functions with the sensors's own functions. Intelligent sensor technology can be defined as a convergence component technology that combines intelligent sensor units, intelligent algorithms, modules with signal processing circuits, and integrated plaform technologies. Intelligent sensor technology, which can be applied to variety of smart IT convergence services such as smart devices, smart homes, smart cars, smart factory, smart cities, and others, is evolving towards intelligent and convergence technologies that produce new high-value information through recognition, reasoning, and judgement based on artificial intelligence. As a result, development of intelligent sensor units is accelerating with strategies for miniaturization, low-power consumption and convergence, new form factor such as flexible and stretchable form, and integration of high-resolution sensor arrays. In the future, these intelligent sensor technologies will lead explosive sensor industries in the era of data-based artificial intelligence and will greatly contribute to enhancing nation's competitiveness in the global sensor market. In this report, we analyze and summarize the recent trends in intelligent sensor technologies, especially those for four core technologies.

PECVD 방법으로 증착한 SiOx(x<2) 박막의 광학적 특성 규명 (Optical Properties of Silicon Oxide (SiOx, x<2) Thin Films Deposited by PECVD Technique)

  • 김영일;박병열;김은겸;한문섭;석중현;박경완
    • 대한금속재료학회지
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    • 제49권9호
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    • pp.732-738
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    • 2011
  • Silicon oxide thin films were deposited by using a plasma-enhanced chemical-vapor deposition technique to investigate the light emission properties. The photoluminescence characteristics were divided into two categories along the relative ratio of the flow rates of $SiH_4$ and $N_2O$ source gases, which show light emission in the broad/visible range and a light emission peak at 380 nm. We attribute the broad/visible light emission and the light emission peak to the quantum confinement effect of nanocrystalline silicon and the Si=O defects, respectively. Changes in the photoluminescence spectra were observed after the post-annealing processes. The photoluminescence spectra of the broad light emission in the visible range shifted to the long wavelength and were saturated above an annealing temperature of $900^{\circ}C$ or after 1 hour annealing at $970^{\circ}C$. However, the position of the light emission peak at 380 nm did not change at all after the post-annealing processes. The light emission intensities at 380 nm initially increased, and decreased at annealing temperatures above $700^{\circ}C$ or after 1 hour annealing at $700^{\circ}C$. The photoluminescence behaviors after the annealing processes can be explained bythe size change of the nanocrystalline silicon and the density change of Si=O defect in the films, respectively. These results support the possibility of using a silicon-based light source for Si-optoelectronic integrated circuits and/or display devices.

최근 터치스크린 Readout 시스템의 연구 경향 (Recent Research Trends in Touchscreen Readout Systems)

  • 이준민;함주원;장우석;이하민;구상모;오종민;고승훈
    • 한국전기전자재료학회논문지
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    • 제36권5호
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    • pp.423-432
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    • 2023
  • With the increasing demand for mobile devices featuring multi-touch operation, extensive research is being conducted on touch screen panel (TSP) Readout ICs (ROICs) that should possess low power consumption, compact chip size, and immunity to external noise. Therefore, this paper discusses capacitive touch sensors and their readout circuits, and it introduces research trends in various circuit designs that are robust against external noise sources. The recent state-of-the-art TSP ROICs have primarily focused on minimizing the impact of parasitic capacitance (Cp) caused by thin panel thickness. The large Cp can be effectively compensated using an area-efficient current compensator and Current Conveyor (CC), while a display noise reduction scheme utilizing a noise-antenna (NA) electrode significantly improves the signal-to-noise ratio (SNR). Based on these achievements, it is expected that future TSP ROICs will be capable of stable operation with thinner and flexible Touch Screen Panels (TSPs).

Analysis of issues in gate recess etching in the InAlAs/InGaAs HEMT manufacturing process

  • Byoung-Gue Min;Jong-Min Lee;Hyung Sup Yoon;Woo-Jin Chang;Jong-Yul Park;Dong Min Kang;Sung-Jae Chang;Hyun-Wook Jung
    • ETRI Journal
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    • 제45권1호
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    • pp.171-179
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    • 2023
  • We have developed an InAlAs/InGaAs metamorphic high electron mobility transistor device fabrication process where the gate length can be tuned within the range of 0.13㎛-0.16㎛ to suit the intended application. The core processes are a two-step electron-beam lithography process using a three-layer resist and gate recess etching process using citric acid. An electron-beam lithography process was developed to fabricate a T-shaped gate electrode with a fine gate foot and a relatively large gate head. This was realized through the use of three-layered resist and two-step electron beam exposure and development. Citric acid-based gate recess etching is a wet etching, so it is very important to secure etching uniformity and process reproducibility. The device layout was designed by considering the electrochemical reaction involved in recess etching, and a reproducible gate recess etching process was developed by finding optimized etching conditions. Using the developed gate electrode process technology, we were able to successfully manufacture various monolithic microwave integrated circuits, including low noise amplifiers that can be used in the 28 GHz to 94 GHz frequency range.

웨어러블 근전도 디바이스 결합형 스마트의류 개발 및 성능평가 (Development and Evaluation of Wearable Smart Clothing for Combined EMG Devices)

  • 이소정;김혜림;정원영
    • 한국의류산업학회지
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    • 제25권2호
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    • pp.210-220
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    • 2023
  • Recently, smart wearable products, including electromyography (EMG) measurement devices and clothing, have been developed to monitor users' exercise levels, muscle activation, and muscle balance more effectively during fitness activities. However, technical and socioeconomic barriers, such as flexibility and durability, still pose challenges in terms of comfort, ease of wear, and wearability of smart clothing, which includes devices and circuits. To address these issues, this study developed a wearable EMG device integrated with clothing to collect valid EMG signals from desired muscles while maintaining comfort, functionality, and ease of wear. After deriving a combined structure that could stably position the wearable device within the clothing, a prototype was manufactured and evaluated for fit, compression, comfort, and exercise comfort test by ten participants (height = 176.2 cm, weight = 76.4 kg, chest circumference = 101.2 cm). The study found that the prototype had smaller circumferences around the chest, waist, and abdomen compared to commercial products, resulting in lower ratings for wearing comfort and ease of wear. However, the prototype received high ratings for fitting, pressure, and the exercise comfort test. Valid signals were obtained when the EMG device was combined to the prototype for the rectus femoris muscle, indicating stable positioning of the device during exercise.

Development of Three-Dimensional Deformable Flexible Printed Circuit Boards Using Ag Flake-Based Conductors and Thermoplastic Polyamide Substrates

  • Aram Lee;Minji Kang;Do Young Kim;Hee Yoon Jang;Ji-Won Park;Tae-Wook Kim;Jae-Min Hong;Seoung-Ki Lee
    • 한국전기전자재료학회논문지
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    • 제37권4호
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    • pp.420-426
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    • 2024
  • This study proposes an innovative methodology for developing flexible printed circuit boards (FPCBs) capable of conforming to three-dimensional shapes, meeting the increasing demand for electronic circuits in diverse and complex product designs. By integrating a traditional flat plate-based fabrication process with a subsequent three-dimensional thermal deformation technique, we have successfully demonstrated an FPCB that maintains stable electrical characteristics despite significant shape deformations. Using a modified polyimide substrate along with Ag flake-based conductive ink, we identified optimized process variables that enable substrate thermal deformation at lower temperatures (~130℃) and enhance the stretchability of the conductive ink (ε ~30%). The application of this novel FPCB in a prototype 3D-shaped sensor device, incorporating photosensors and temperature sensors, illustrates its potential for creating multifunctional, shape-adaptable electronic devices. The sensor can detect external light sources and measure ambient temperature, demonstrating stable operation even after transitioning from a planar to a three-dimensional configuration. This research lays the foundation for next-generation FPCBs that can be seamlessly integrated into various products, ushering in a new era of electronic device design and functionality.

Ka 대역 위성통신 하향 링크를 위한 GaN 전력증폭기 집적회로 (GaN HPA Monolithic Microwave Integrated Circuit for Ka band Satellite Down link Payload)

  • 지홍구
    • 한국산학기술학회논문지
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    • 제16권12호
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    • pp.8643-8648
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    • 2015
  • 본 논문은 Ka대역 위성통신 탑재체의 하향링크대역인 주파수 19.5 GHz ~ 22 GHz대역에서 사용가능한 8W급 전력증폭기를 3단으로 설계 및 제작하여 특성 평가한 과정을 기술하였다. 제작된 전력증폭기 GaN MMIC는 3단으로 구성된 HEMT(High Electron Mobility Transistor)들로 이루어 졌으며 증폭기의 첫 번째단 게이트 폭은 $8{\times}50{\times}2um$, 두 번째단 게이트폭은 $8{\times}50{\times}4um$, 마지막단인 출력단의 게이트 폭은 $8{\times}50{\times}8um$의 구조로 이루어 졌다. 0.15 um GaN 공정으로 제작된 전력 증폭기 MMIC의 사이즈는 $3,400{\times}3,200um^2$ 이고 주파수 19.5 GHz ~ 22 GHz대역에서 입력 전압 20 V 일 때, 소신호 및 대신호 측정 결과 소신호 이득 29.6 dB 이상, 입력정합 최소 -8.2 dB, 출력정합 -9.7 dB, 최소 39.1 dBm의 출력전력, 최소 25.3%의 전력 부가 효율을 나타내었다. 따라서 설계 및 제작된 전력증폭기 MMIC는 Ka대역 위성통신 탑재체의 하향링크에 사용이 가능할 것으로 판단된다.

The surface kinetic properties of $ZrO_2$ Thin Films in dry etching by Inductively Coupled Plasma

  • Yang-Xue, Yang-Xue;Kim, Hwan-Jun;Kim, Dong-Pyo;Um, Doo-Seung;Woo, Jong-Chang;Kim, Chang-Il
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.105-105
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    • 2009
  • $ZrO_2$ is one of the most attractive high dielectric constant (high-k) materials. As integrated circuit device dimensions continue to be scaled down, high-k materials have been studied more to resolve the problems for replacing the EY31conventional $SiO_2$. $ZrO_2$ has many favorable properties as a high dielectric constant (k= 20~25), wide band gap (5~7 eV) as well as a close thermal expansion coefficient with Si that results in good thermal stability of the $ZrO_2/Si$ structure. In order to get fine-line patterns, plasma etching has been studied more in the fabrication of ultra large-scale integrated circuits. The relation between the etch characteristics of high-k dielectric materials and plasma properties is required to be studied more to match standard processing procedure with low damaged removal process. Due to the easy control of ion energy and flux, low ownership and simple structure of the inductively coupled plasma (ICP), we chose it for high-density plasma in our study. And the $BCl_3$ included in the gas due to the effective extraction of oxygen in the form of $BCl_xO_y$ compound In this study, the surface kinetic properties of $ZrO_2$ thin film was investigated in function of Ch addition to $BCl_3/Ar$ gas mixture ratio, RF power and DC-bias power based on substrate temperature. The figure 1 showed the etch rate of $ZrO_2$ thin film as function of gas mixing ratio of $Cl_2/BCl_3/Ar$ dependent on temperature. The chemical state of film was investigated using x-ray photoelectron spectroscopy (XPS). The characteristics of the plasma were estimated using optical emission spectroscopy (OES). Auger electron spectroscopy (AES) was used for elemental analysis of etched surface.

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