• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.435-436
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• 2008

This paper presents a dual band frequency synthesizer for GSM and Wideband CDMA which is designed in a standard 0.13um CMOS 1P6M process. The shared components include phase frequency detector (PFD), charge pump (CP), loop filter, integer frequency divider(128/129 DMP, 4bit PC, 3bit SC) and Low noise Ring-VCO. A high-speed low power dual modulus prescaler is proposed to operate up to 2.1GHz at 3.3V supply voltage with 2mW power consumption by simulation. The simulated phase noise of VCO is -101dBc/Hz at 200kHz offset frequency from 1.9GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.12
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• pp.16-21
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• 2007

In this paper, the dual-band voltage-controled oscillator (VCO) using the composite right/left-handed (CRLH) transmission line (TL) and the tunable negative resistance based on the fin diode is presented. It is demonstrated that the CRLH TL can lead to metamaterial transmission line with the dual-band tuning capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the phase slope of the CRLH TL, and the frequency ratio of the two operating frequencies can be a non-integer. Each frequency band of VCO has to operate independently, so we have used the tunable negative resistance based on the pin diode. When the forward bias has been into the pin diode, the phase noise of VCO is $-108.34\sim-106.67$ dBc/Hz @ 100 kHz in the tuning range, $2.423\sim2.597$ GHz, whereas when the reverse bias has been fed into the pin diode, that of VCO is $-114.16\sim-113.33$ dBc/Hz @ 100 kHz in the tuning range, $5.137\sim5.354$ GHz.